![James Hogan](/assets/img/avatar_default.png)
Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes being reparented during clk_set_rate. To avoid breaking existing platforms, all callers of clk_register_mux() are adjusted to pass the new flag. Platform maintainers are encouraged to remove the flag if they wish to allow mux reparenting on set_rate. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Chao Xie <xiechao.mail@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Emilio López" <emilio@elopez.com.ar> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Andrew Chew <achew@nvidia.com> Cc: Doug Anderson <dianders@chromium.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Tomasz Figa <t.figa@samsung.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: spear-devel@list.st.com Cc: linux-tegra@vger.kernel.org Tested-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com> [tegra] Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi] Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq] Signed-off-by: Mike Turquette <mturquette@linaro.org>
67 lines
1.9 KiB
C
67 lines
1.9 KiB
C
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __MXS_CLK_H
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#define __MXS_CLK_H
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/spinlock.h>
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#define SET 0x4
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#define CLR 0x8
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extern spinlock_t mxs_lock;
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int mxs_clk_wait(void __iomem *reg, u8 shift);
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struct clk *mxs_clk_pll(const char *name, const char *parent_name,
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void __iomem *base, u8 power, unsigned long rate);
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struct clk *mxs_clk_ref(const char *name, const char *parent_name,
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void __iomem *reg, u8 idx);
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struct clk *mxs_clk_div(const char *name, const char *parent_name,
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void __iomem *reg, u8 shift, u8 width, u8 busy);
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struct clk *mxs_clk_frac(const char *name, const char *parent_name,
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void __iomem *reg, u8 shift, u8 width, u8 busy);
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static inline struct clk *mxs_clk_fixed(const char *name, int rate)
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{
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return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
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}
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static inline struct clk *mxs_clk_gate(const char *name,
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const char *parent_name, void __iomem *reg, u8 shift)
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{
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return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT,
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reg, shift, CLK_GATE_SET_TO_DISABLE,
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&mxs_lock);
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}
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static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parent_names, int num_parents)
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{
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return clk_register_mux(NULL, name, parent_names, num_parents,
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CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
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reg, shift, width, 0, &mxs_lock);
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}
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static inline struct clk *mxs_clk_fixed_factor(const char *name,
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const char *parent_name, unsigned int mult, unsigned int div)
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{
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return clk_register_fixed_factor(NULL, name, parent_name,
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CLK_SET_RATE_PARENT, mult, div);
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}
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#endif /* __MXS_CLK_H */
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