![Vipul Kumar Samar](/assets/img/avatar_default.png)
Flag CLK_SET_RATE_PARENT is required for a clock, where we want to propagate clk_set_rate to its parent. This patch adds this to multiple clocks. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by: Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
200 lines
4.8 KiB
C
200 lines
4.8 KiB
C
/*
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* Copyright (C) 2012 ST Microelectronics
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* Viresh Kumar <viresh.linux@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* Auxiliary Synthesizer clock implementation
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*/
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#define pr_fmt(fmt) "clk-aux-synth: " fmt
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include "clk.h"
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/*
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* DOC: Auxiliary Synthesizer clock
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*
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* Aux synth gives rate for different values of eq, x and y
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*
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* Fout from synthesizer can be given from two equations:
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* Fout1 = (Fin * X/Y)/2 EQ1
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* Fout2 = Fin * X/Y EQ2
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*/
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#define to_clk_aux(_hw) container_of(_hw, struct clk_aux, hw)
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static struct aux_clk_masks default_aux_masks = {
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.eq_sel_mask = AUX_EQ_SEL_MASK,
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.eq_sel_shift = AUX_EQ_SEL_SHIFT,
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.eq1_mask = AUX_EQ1_SEL,
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.eq2_mask = AUX_EQ2_SEL,
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.xscale_sel_mask = AUX_XSCALE_MASK,
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.xscale_sel_shift = AUX_XSCALE_SHIFT,
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.yscale_sel_mask = AUX_YSCALE_MASK,
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.yscale_sel_shift = AUX_YSCALE_SHIFT,
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.enable_bit = AUX_SYNT_ENB,
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};
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static unsigned long aux_calc_rate(struct clk_hw *hw, unsigned long prate,
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int index)
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{
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struct clk_aux *aux = to_clk_aux(hw);
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struct aux_rate_tbl *rtbl = aux->rtbl;
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u8 eq = rtbl[index].eq ? 1 : 2;
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return (((prate / 10000) * rtbl[index].xscale) /
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(rtbl[index].yscale * eq)) * 10000;
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}
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static long clk_aux_round_rate(struct clk_hw *hw, unsigned long drate,
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unsigned long *prate)
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{
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struct clk_aux *aux = to_clk_aux(hw);
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int unused;
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return clk_round_rate_index(hw, drate, *prate, aux_calc_rate,
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aux->rtbl_cnt, &unused);
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}
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static unsigned long clk_aux_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_aux *aux = to_clk_aux(hw);
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unsigned int num = 1, den = 1, val, eqn;
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unsigned long flags = 0;
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if (aux->lock)
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spin_lock_irqsave(aux->lock, flags);
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val = readl_relaxed(aux->reg);
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if (aux->lock)
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spin_unlock_irqrestore(aux->lock, flags);
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eqn = (val >> aux->masks->eq_sel_shift) & aux->masks->eq_sel_mask;
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if (eqn == aux->masks->eq1_mask)
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den = 2;
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/* calculate numerator */
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num = (val >> aux->masks->xscale_sel_shift) &
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aux->masks->xscale_sel_mask;
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/* calculate denominator */
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den *= (val >> aux->masks->yscale_sel_shift) &
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aux->masks->yscale_sel_mask;
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if (!den)
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return 0;
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return (((parent_rate / 10000) * num) / den) * 10000;
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}
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/* Configures new clock rate of aux */
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static int clk_aux_set_rate(struct clk_hw *hw, unsigned long drate,
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unsigned long prate)
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{
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struct clk_aux *aux = to_clk_aux(hw);
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struct aux_rate_tbl *rtbl = aux->rtbl;
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unsigned long val, flags = 0;
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int i;
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clk_round_rate_index(hw, drate, prate, aux_calc_rate, aux->rtbl_cnt,
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&i);
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if (aux->lock)
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spin_lock_irqsave(aux->lock, flags);
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val = readl_relaxed(aux->reg) &
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~(aux->masks->eq_sel_mask << aux->masks->eq_sel_shift);
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val |= (rtbl[i].eq & aux->masks->eq_sel_mask) <<
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aux->masks->eq_sel_shift;
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val &= ~(aux->masks->xscale_sel_mask << aux->masks->xscale_sel_shift);
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val |= (rtbl[i].xscale & aux->masks->xscale_sel_mask) <<
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aux->masks->xscale_sel_shift;
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val &= ~(aux->masks->yscale_sel_mask << aux->masks->yscale_sel_shift);
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val |= (rtbl[i].yscale & aux->masks->yscale_sel_mask) <<
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aux->masks->yscale_sel_shift;
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writel_relaxed(val, aux->reg);
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if (aux->lock)
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spin_unlock_irqrestore(aux->lock, flags);
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return 0;
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}
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static struct clk_ops clk_aux_ops = {
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.recalc_rate = clk_aux_recalc_rate,
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.round_rate = clk_aux_round_rate,
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.set_rate = clk_aux_set_rate,
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};
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struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
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const char *parent_name, unsigned long flags, void __iomem *reg,
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struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,
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u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk)
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{
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struct clk_aux *aux;
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struct clk_init_data init;
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struct clk *clk;
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if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
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pr_err("Invalid arguments passed");
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return ERR_PTR(-EINVAL);
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}
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aux = kzalloc(sizeof(*aux), GFP_KERNEL);
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if (!aux) {
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pr_err("could not allocate aux clk\n");
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return ERR_PTR(-ENOMEM);
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}
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/* struct clk_aux assignments */
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if (!masks)
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aux->masks = &default_aux_masks;
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else
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aux->masks = masks;
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aux->reg = reg;
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aux->rtbl = rtbl;
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aux->rtbl_cnt = rtbl_cnt;
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aux->lock = lock;
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aux->hw.init = &init;
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init.name = aux_name;
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init.ops = &clk_aux_ops;
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init.flags = flags;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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clk = clk_register(NULL, &aux->hw);
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if (IS_ERR_OR_NULL(clk))
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goto free_aux;
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if (gate_name) {
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struct clk *tgate_clk;
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tgate_clk = clk_register_gate(NULL, gate_name, aux_name,
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CLK_SET_RATE_PARENT, reg,
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aux->masks->enable_bit, 0, lock);
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if (IS_ERR_OR_NULL(tgate_clk))
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goto free_aux;
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if (gate_clk)
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*gate_clk = tgate_clk;
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}
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return clk;
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free_aux:
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kfree(aux);
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pr_err("clk register failed\n");
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return NULL;
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}
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