1636d88357
The mv88e6172 is part of the mv88e6352 family of devices. Move support for it out of the mv88e6171 driver into the mv88e6352, which results in some simplifications to the code. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
399 lines
8 KiB
C
399 lines
8 KiB
C
/*
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* net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
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*
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* Copyright (c) 2014 Guenter Roeck
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*
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* Derived from mv88e6123_61_65.c
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
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{
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struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
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int ret;
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if (bus == NULL)
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return NULL;
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ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
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if (ret >= 0) {
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6172)
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return "Marvell 88E6172";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6176)
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return "Marvell 88E6176";
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if (ret == PORT_SWITCH_ID_6352_A0)
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return "Marvell 88E6352 (A0)";
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if (ret == PORT_SWITCH_ID_6352_A1)
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return "Marvell 88E6352 (A1)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6352)
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return "Marvell 88E6352";
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}
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return NULL;
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}
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static int mv88e6352_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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return ret;
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/* Discard packets with excessive collisions,
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* mask all interrupt sources, enable PPU (bit 14, undocumented).
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*/
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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*/
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REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
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return 0;
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}
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#ifdef CONFIG_NET_DSA_HWMON
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static int mv88e6352_get_temp(struct dsa_switch *ds, int *temp)
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{
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int ret;
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*temp = 0;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 27);
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if (ret < 0)
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return ret;
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*temp = (ret & 0xff) - 25;
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return 0;
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}
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static int mv88e6352_get_temp_limit(struct dsa_switch *ds, int *temp)
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{
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int ret;
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*temp = 0;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);
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if (ret < 0)
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return ret;
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*temp = (((ret >> 8) & 0x1f) * 5) - 25;
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return 0;
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}
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static int mv88e6352_set_temp_limit(struct dsa_switch *ds, int temp)
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{
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int ret;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);
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if (ret < 0)
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return ret;
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temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
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return mv88e6xxx_phy_page_write(ds, 0, 6, 26,
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(ret & 0xe0ff) | (temp << 8));
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}
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static int mv88e6352_get_temp_alarm(struct dsa_switch *ds, bool *alarm)
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{
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int ret;
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*alarm = false;
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ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);
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if (ret < 0)
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return ret;
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*alarm = !!(ret & 0x40);
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return 0;
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}
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#endif /* CONFIG_NET_DSA_HWMON */
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static int mv88e6352_setup(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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ret = mv88e6xxx_setup_common(ds);
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if (ret < 0)
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return ret;
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ps->num_ports = 7;
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mutex_init(&ps->eeprom_mutex);
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ret = mv88e6xxx_switch_reset(ds, true);
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if (ret < 0)
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return ret;
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ret = mv88e6352_setup_global(ds);
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if (ret < 0)
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return ret;
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return mv88e6xxx_setup_ports(ds);
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}
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static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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mutex_lock(&ps->eeprom_mutex);
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
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0xc000 | (addr & 0xff));
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_eeprom_busy_wait(ds);
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x15);
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error:
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mutex_unlock(&ps->eeprom_mutex);
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return ret;
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}
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static int mv88e6352_get_eeprom(struct dsa_switch *ds,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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int offset;
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int len;
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int ret;
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offset = eeprom->offset;
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len = eeprom->len;
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eeprom->len = 0;
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eeprom->magic = 0xc3ec4951;
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ret = mv88e6xxx_eeprom_load_wait(ds);
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if (ret < 0)
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return ret;
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if (offset & 1) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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*data++ = (word >> 8) & 0xff;
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offset++;
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len--;
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eeprom->len++;
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}
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while (len >= 2) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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*data++ = word & 0xff;
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*data++ = (word >> 8) & 0xff;
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offset += 2;
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len -= 2;
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eeprom->len += 2;
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}
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if (len) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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*data++ = word & 0xff;
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offset++;
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len--;
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eeprom->len++;
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}
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return 0;
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}
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static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
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{
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int ret;
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ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x14);
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if (ret < 0)
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return ret;
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if (!(ret & 0x0400))
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return -EROFS;
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return 0;
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}
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static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
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u16 data)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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mutex_lock(&ps->eeprom_mutex);
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x15, data);
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,
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0xb000 | (addr & 0xff));
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_eeprom_busy_wait(ds);
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error:
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mutex_unlock(&ps->eeprom_mutex);
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return ret;
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}
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static int mv88e6352_set_eeprom(struct dsa_switch *ds,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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int offset;
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int ret;
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int len;
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if (eeprom->magic != 0xc3ec4951)
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return -EINVAL;
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ret = mv88e6352_eeprom_is_readonly(ds);
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if (ret)
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return ret;
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offset = eeprom->offset;
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len = eeprom->len;
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eeprom->len = 0;
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ret = mv88e6xxx_eeprom_load_wait(ds);
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if (ret < 0)
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return ret;
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if (offset & 1) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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word = (*data++ << 8) | (word & 0xff);
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ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
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if (ret < 0)
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return ret;
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offset++;
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len--;
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eeprom->len++;
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}
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while (len >= 2) {
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int word;
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word = *data++;
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word |= *data++ << 8;
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ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
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if (ret < 0)
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return ret;
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offset += 2;
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len -= 2;
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eeprom->len += 2;
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}
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if (len) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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word = (word & 0xff00) | *data++;
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ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
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if (ret < 0)
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return ret;
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offset++;
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len--;
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eeprom->len++;
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}
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return 0;
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}
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struct dsa_switch_driver mv88e6352_switch_driver = {
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.priv_size = sizeof(struct mv88e6xxx_priv_state),
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.probe = mv88e6352_probe,
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.setup = mv88e6352_setup,
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.set_addr = mv88e6xxx_set_addr_indirect,
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.phy_read = mv88e6xxx_phy_read_indirect,
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.phy_write = mv88e6xxx_phy_write_indirect,
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.poll_link = mv88e6xxx_poll_link,
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.get_strings = mv88e6xxx_get_strings,
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.get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
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.get_sset_count = mv88e6xxx_get_sset_count,
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.set_eee = mv88e6xxx_set_eee,
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.get_eee = mv88e6xxx_get_eee,
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#ifdef CONFIG_NET_DSA_HWMON
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.get_temp = mv88e6352_get_temp,
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.get_temp_limit = mv88e6352_get_temp_limit,
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.set_temp_limit = mv88e6352_set_temp_limit,
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.get_temp_alarm = mv88e6352_get_temp_alarm,
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#endif
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.get_eeprom = mv88e6352_get_eeprom,
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.set_eeprom = mv88e6352_set_eeprom,
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.get_regs_len = mv88e6xxx_get_regs_len,
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.get_regs = mv88e6xxx_get_regs,
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.port_join_bridge = mv88e6xxx_join_bridge,
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.port_leave_bridge = mv88e6xxx_leave_bridge,
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.port_stp_update = mv88e6xxx_port_stp_update,
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.fdb_add = mv88e6xxx_port_fdb_add,
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.fdb_del = mv88e6xxx_port_fdb_del,
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.fdb_getnext = mv88e6xxx_port_fdb_getnext,
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};
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MODULE_ALIAS("platform:mv88e6352");
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MODULE_ALIAS("platform:mv88e6172");
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