21330497f3
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The ADPLLs have several dividers and muxes controlled by a shared control register for each PLL. Note that for the clocks to work as device drivers for booting on dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall levels to postcore_initcall" that has already been merged. Also note that this patch does not implement clk_set_rate for the PLL, that will be posted later on when available. Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
7 lines
220 B
Plaintext
7 lines
220 B
Plaintext
config COMMON_CLK_TI_ADPLL
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tristate "Clock driver for dm814x ADPLL"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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default y if SOC_TI81XX
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---help---
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ADPLL clock driver for the dm814x SoC using common clock framework.
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