16d72dd489
Pull parisc fixes from Helge Deller: - Fix crashes when accessing PCI devices on some machines like C240 and J5000. The crashes were triggered because we replaced cache flushes by nops in the alternative coding where we shouldn't for some machines. - Dave fixed a race in the usage of the sr1 space register when used to load the coherence index. - Use the hardware lpa instruction to to load the physical address of kernel virtual addresses in the iommu driver code. - The kernel may fail to link when CONFIG_MLONGCALLS isn't set. Solve that by rearranging functions in the final vmlinux executeable. - Some defconfig cleanups and removal of compiler warnings. * 'parisc-5.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Fix crash due alternative coding for NP iopdir_fdc bit parisc: Use lpa instruction to load physical addresses in driver code parisc: configs: Remove useless UEVENT_HELPER_PATH parisc: Use implicit space register selection for loading the coherence index of I/O pdirs parisc: Fix compiler warnings in float emulation code parisc/slab: cleanup after /proc/slab_allocators removal parisc: Allow building 64-bit kernel without -mlong-calls compiler option parisc: Kconfig: remove ARCH_DISCARD_MEMBLOCK
364 lines
12 KiB
C
364 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Linux/PA-RISC Project (http://www.parisc-linux.org/)
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*
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* Floating-point emulation code
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* Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
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*/
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#ifdef __NO_PA_HDRS
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PA header file -- do not include this header file for non-PA builds.
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#endif
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/*
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* Some more constants
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*/
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#define SGL_FX_MAX_EXP 30
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#define DBL_FX_MAX_EXP 62
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#define QUAD_FX_MAX_EXP 126
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#define Dintp1(object) (object)
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#define Dintp2(object) (object)
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#define Duintp1(object) (object)
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#define Duintp2(object) (object)
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#define Qintp0(object) (object)
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#define Qintp1(object) (object)
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#define Qintp2(object) (object)
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#define Qintp3(object) (object)
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/*
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* These macros will be used specifically by the convert instructions.
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*
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*
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* Single format macros
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*/
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#define Sgl_to_dbl_exponent(src_exponent,dest) \
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Deposit_dexponent(dest,src_exponent+(DBL_BIAS-SGL_BIAS))
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#define Sgl_to_dbl_mantissa(src_mantissa,destA,destB) \
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Deposit_dmantissap1(destA,src_mantissa>>3); \
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Dmantissap2(destB) = src_mantissa << 29
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#define Sgl_isinexact_to_fix(sgl_value,exponent) \
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((exponent < (SGL_P - 1)) ? \
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(Sall(sgl_value) << (SGL_EXP_LENGTH + 1 + exponent)) : FALSE)
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#define Int_isinexact_to_sgl(int_value) ((int_value << 33 - SGL_EXP_LENGTH) != 0)
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#define Sgl_roundnearest_from_int(int_value,sgl_value) \
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if (int_value & 1<<(SGL_EXP_LENGTH - 2)) /* round bit */ \
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if (((int_value << 34 - SGL_EXP_LENGTH) != 0) || Slow(sgl_value)) \
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Sall(sgl_value)++
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#define Dint_isinexact_to_sgl(dint_valueA,dint_valueB) \
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(((Dintp1(dint_valueA) << 33 - SGL_EXP_LENGTH) != 0) || Dintp2(dint_valueB))
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#define Sgl_roundnearest_from_dint(dint_valueA,dint_valueB,sgl_value) \
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if (Dintp1(dint_valueA) & 1<<(SGL_EXP_LENGTH - 2)) \
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if (((Dintp1(dint_valueA) << 34 - SGL_EXP_LENGTH) != 0) || \
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Dintp2(dint_valueB) || Slow(sgl_value)) Sall(sgl_value)++
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#define Dint_isinexact_to_dbl(dint_value) \
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(Dintp2(dint_value) << 33 - DBL_EXP_LENGTH)
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#define Dbl_roundnearest_from_dint(dint_opndB,dbl_opndA,dbl_opndB) \
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if (Dintp2(dint_opndB) & 1<<(DBL_EXP_LENGTH - 2)) \
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if ((Dintp2(dint_opndB) << 34 - DBL_EXP_LENGTH) || Dlowp2(dbl_opndB)) \
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if ((++Dallp2(dbl_opndB))==0) Dallp1(dbl_opndA)++
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#define Sgl_isone_roundbit(sgl_value,exponent) \
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((Sall(sgl_value) << (SGL_EXP_LENGTH + 1 + exponent)) >> 31)
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#define Sgl_isone_stickybit(sgl_value,exponent) \
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(exponent < (SGL_P - 2) ? \
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Sall(sgl_value) << (SGL_EXP_LENGTH + 2 + exponent) : FALSE)
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/*
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* Double format macros
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*/
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#define Dbl_to_sgl_exponent(src_exponent,dest) \
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dest = src_exponent + (SGL_BIAS - DBL_BIAS)
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#define Dbl_to_sgl_mantissa(srcA,srcB,dest,inexact,guard,sticky,odd) \
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Shiftdouble(Dmantissap1(srcA),Dmantissap2(srcB),29,dest); \
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guard = Dbit3p2(srcB); \
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sticky = Dallp2(srcB)<<4; \
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inexact = guard | sticky; \
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odd = Dbit2p2(srcB)
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#define Dbl_to_sgl_denormalized(srcA,srcB,exp,dest,inexact,guard,sticky,odd,tiny) \
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Deposit_dexponent(srcA,1); \
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tiny = TRUE; \
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if (exp >= -2) { \
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if (exp == 0) { \
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inexact = Dallp2(srcB) << 3; \
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guard = inexact >> 31; \
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sticky = inexact << 1; \
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Shiftdouble(Dmantissap1(srcA),Dmantissap2(srcB),29,dest); \
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odd = dest << 31; \
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if (inexact) { \
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switch(Rounding_mode()) { \
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case ROUNDPLUS: \
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if (Dbl_iszero_sign(srcA)) { \
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dest++; \
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if (Sgl_isone_hidden(dest)) \
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tiny = FALSE; \
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dest--; \
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} \
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break; \
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case ROUNDMINUS: \
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if (Dbl_isone_sign(srcA)) { \
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dest++; \
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if (Sgl_isone_hidden(dest)) \
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tiny = FALSE; \
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dest--; \
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} \
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break; \
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case ROUNDNEAREST: \
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if (guard && (sticky || odd)) { \
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dest++; \
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if (Sgl_isone_hidden(dest)) \
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tiny = FALSE; \
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dest--; \
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} \
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break; \
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} \
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} \
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/* shift right by one to get correct result */ \
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guard = odd; \
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sticky = inexact; \
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inexact |= guard; \
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dest >>= 1; \
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Deposit_dsign(srcA,0); \
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Shiftdouble(Dallp1(srcA),Dallp2(srcB),30,dest); \
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odd = dest << 31; \
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} \
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else { \
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inexact = Dallp2(srcB) << (2 + exp); \
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guard = inexact >> 31; \
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sticky = inexact << 1; \
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Deposit_dsign(srcA,0); \
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if (exp == -2) dest = Dallp1(srcA); \
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else Variable_shift_double(Dallp1(srcA),Dallp2(srcB),30-exp,dest); \
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odd = dest << 31; \
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} \
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} \
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else { \
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Deposit_dsign(srcA,0); \
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if (exp > (1 - SGL_P)) { \
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dest = Dallp1(srcA) >> (- 2 - exp); \
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inexact = Dallp1(srcA) << (34 + exp); \
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guard = inexact >> 31; \
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sticky = (inexact << 1) | Dallp2(srcB); \
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inexact |= Dallp2(srcB); \
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odd = dest << 31; \
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} \
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else { \
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dest = 0; \
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inexact = Dallp1(srcA) | Dallp2(srcB); \
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if (exp == (1 - SGL_P)) { \
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guard = Dhidden(srcA); \
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sticky = Dmantissap1(srcA) | Dallp2(srcB); \
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} \
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else { \
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guard = 0; \
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sticky = inexact; \
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} \
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odd = 0; \
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} \
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} \
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exp = 0
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#define Dbl_isinexact_to_fix(dbl_valueA,dbl_valueB,exponent) \
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(exponent < (DBL_P-33) ? \
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Dallp2(dbl_valueB) || Dallp1(dbl_valueA) << (DBL_EXP_LENGTH+1+exponent) : \
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(exponent < (DBL_P-1) ? Dallp2(dbl_valueB) << (exponent + (33-DBL_P)) : \
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FALSE))
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#define Dbl_isoverflow_to_int(exponent,dbl_valueA,dbl_valueB) \
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((exponent > SGL_FX_MAX_EXP + 1) || Dsign(dbl_valueA)==0 || \
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Dmantissap1(dbl_valueA)!=0 || (Dallp2(dbl_valueB)>>21)!=0 )
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#define Dbl_isone_roundbit(dbl_valueA,dbl_valueB,exponent) \
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((exponent < (DBL_P - 33) ? \
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Dallp1(dbl_valueA) >> ((30 - DBL_EXP_LENGTH) - exponent) : \
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Dallp2(dbl_valueB) >> ((DBL_P - 2) - exponent)) & 1)
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#define Dbl_isone_stickybit(dbl_valueA,dbl_valueB,exponent) \
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(exponent < (DBL_P-34) ? \
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(Dallp2(dbl_valueB) || Dallp1(dbl_valueA)<<(DBL_EXP_LENGTH+2+exponent)) : \
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(exponent<(DBL_P-2) ? (Dallp2(dbl_valueB) << (exponent + (34-DBL_P))) : \
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FALSE))
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/* Int macros */
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#define Int_from_sgl_mantissa(sgl_value,exponent) \
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Sall(sgl_value) = \
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(unsigned)(Sall(sgl_value) << SGL_EXP_LENGTH)>>(31 - exponent)
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#define Int_from_dbl_mantissa(dbl_valueA,dbl_valueB,exponent) \
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Shiftdouble(Dallp1(dbl_valueA),Dallp2(dbl_valueB),22,Dallp1(dbl_valueA)); \
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if (exponent < 31) Dallp1(dbl_valueA) >>= 30 - exponent; \
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else Dallp1(dbl_valueA) <<= 1
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#define Int_negate(int_value) int_value = -int_value
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/* Dint macros */
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#define Dint_from_sgl_mantissa(sgl_value,exponent,dresultA,dresultB) \
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{Sall(sgl_value) <<= SGL_EXP_LENGTH; /* left-justify */ \
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if (exponent <= 31) { \
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Dintp1(dresultA) = 0; \
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Dintp2(dresultB) = (unsigned)Sall(sgl_value) >> (31 - exponent); \
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} \
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else { \
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Dintp1(dresultA) = Sall(sgl_value) >> (63 - exponent); \
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Dintp2(dresultB) = Sall(sgl_value) << (exponent - 31); \
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}}
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#define Dint_from_dbl_mantissa(dbl_valueA,dbl_valueB,exponent,destA,destB) \
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{if (exponent < 32) { \
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Dintp1(destA) = 0; \
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if (exponent <= 20) \
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Dintp2(destB) = Dallp1(dbl_valueA) >> 20-exponent; \
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else Variable_shift_double(Dallp1(dbl_valueA),Dallp2(dbl_valueB), \
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52-exponent,Dintp2(destB)); \
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} \
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else { \
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if (exponent <= 52) { \
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Dintp1(destA) = Dallp1(dbl_valueA) >> 52-exponent; \
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if (exponent == 52) Dintp2(destB) = Dallp2(dbl_valueB); \
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else Variable_shift_double(Dallp1(dbl_valueA),Dallp2(dbl_valueB), \
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52-exponent,Dintp2(destB)); \
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} \
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else { \
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Variable_shift_double(Dallp1(dbl_valueA),Dallp2(dbl_valueB), \
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84-exponent,Dintp1(destA)); \
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Dintp2(destB) = Dallp2(dbl_valueB) << exponent-52; \
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} \
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}}
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#define Dint_setzero(dresultA,dresultB) \
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Dintp1(dresultA) = 0; \
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Dintp2(dresultB) = 0
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#define Dint_setone_sign(dresultA,dresultB) \
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Dintp1(dresultA) = ~Dintp1(dresultA); \
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if ((Dintp2(dresultB) = -Dintp2(dresultB)) == 0) Dintp1(dresultA)++
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#define Dint_set_minint(dresultA,dresultB) \
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Dintp1(dresultA) = (unsigned int)1<<31; \
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Dintp2(dresultB) = 0
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#define Dint_isone_lowp2(dresultB) (Dintp2(dresultB) & 01)
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#define Dint_increment(dresultA,dresultB) \
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if ((++Dintp2(dresultB))==0) Dintp1(dresultA)++
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#define Dint_decrement(dresultA,dresultB) \
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if ((Dintp2(dresultB)--)==0) Dintp1(dresultA)--
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#define Dint_negate(dresultA,dresultB) \
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Dintp1(dresultA) = ~Dintp1(dresultA); \
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if ((Dintp2(dresultB) = -Dintp2(dresultB))==0) Dintp1(dresultA)++
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#define Dint_copyfromptr(src,destA,destB) \
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Dintp1(destA) = src->wd0; \
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Dintp2(destB) = src->wd1
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#define Dint_copytoptr(srcA,srcB,dest) \
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dest->wd0 = Dintp1(srcA); \
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dest->wd1 = Dintp2(srcB)
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/* other macros */
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#define Find_ms_one_bit(value, position) \
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{ \
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int var; \
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for (var=8; var >=1; var >>= 1) { \
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if (value >> 32 - position) \
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position -= var; \
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else position += var; \
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} \
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if ((value >> 32 - position) == 0) \
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position--; \
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else position -= 2; \
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}
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/*
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* Unsigned int macros
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*/
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#define Duint_copyfromptr(src,destA,destB) \
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Dint_copyfromptr(src,destA,destB)
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#define Duint_copytoptr(srcA,srcB,dest) \
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Dint_copytoptr(srcA,srcB,dest)
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#define Suint_isinexact_to_sgl(int_value) \
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(int_value << 32 - SGL_EXP_LENGTH)
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#define Sgl_roundnearest_from_suint(suint_value,sgl_value) \
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if (suint_value & 1<<(SGL_EXP_LENGTH - 1)) /* round bit */ \
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if ((suint_value << 33 - SGL_EXP_LENGTH) || Slow(sgl_value)) \
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Sall(sgl_value)++
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#define Duint_isinexact_to_sgl(duint_valueA,duint_valueB) \
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((Duintp1(duint_valueA) << 32 - SGL_EXP_LENGTH) || Duintp2(duint_valueB))
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#define Sgl_roundnearest_from_duint(duint_valueA,duint_valueB,sgl_value) \
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if (Duintp1(duint_valueA) & 1<<(SGL_EXP_LENGTH - 1)) \
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if ((Duintp1(duint_valueA) << 33 - SGL_EXP_LENGTH) || \
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Duintp2(duint_valueB) || Slow(sgl_value)) Sall(sgl_value)++
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#define Duint_isinexact_to_dbl(duint_value) \
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(Duintp2(duint_value) << 32 - DBL_EXP_LENGTH)
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#define Dbl_roundnearest_from_duint(duint_opndB,dbl_opndA,dbl_opndB) \
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if (Duintp2(duint_opndB) & 1<<(DBL_EXP_LENGTH - 1)) \
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if ((Duintp2(duint_opndB) << 33 - DBL_EXP_LENGTH) || Dlowp2(dbl_opndB)) \
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if ((++Dallp2(dbl_opndB))==0) Dallp1(dbl_opndA)++
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#define Suint_from_sgl_mantissa(src,exponent,result) \
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Sall(result) = (unsigned)(Sall(src) << SGL_EXP_LENGTH)>>(31 - exponent)
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#define Sgl_isinexact_to_unsigned(sgl_value,exponent) \
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Sgl_isinexact_to_fix(sgl_value,exponent)
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#define Duint_from_sgl_mantissa(sgl_value,exponent,dresultA,dresultB) \
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{unsigned int val = Sall(sgl_value) << SGL_EXP_LENGTH; \
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if (exponent <= 31) { \
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Dintp1(dresultA) = 0; \
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Dintp2(dresultB) = val >> (31 - exponent); \
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} \
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else { \
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Dintp1(dresultA) = val >> (63 - exponent); \
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Dintp2(dresultB) = exponent <= 62 ? val << (exponent - 31) : 0; \
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} \
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}
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#define Duint_setzero(dresultA,dresultB) \
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Dint_setzero(dresultA,dresultB)
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#define Duint_increment(dresultA,dresultB) Dint_increment(dresultA,dresultB)
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#define Duint_isone_lowp2(dresultB) Dint_isone_lowp2(dresultB)
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#define Suint_from_dbl_mantissa(srcA,srcB,exponent,dest) \
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Shiftdouble(Dallp1(srcA),Dallp2(srcB),21,dest); \
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dest = (unsigned)dest >> 31 - exponent
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#define Dbl_isinexact_to_unsigned(dbl_valueA,dbl_valueB,exponent) \
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Dbl_isinexact_to_fix(dbl_valueA,dbl_valueB,exponent)
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#define Duint_from_dbl_mantissa(dbl_valueA,dbl_valueB,exponent,destA,destB) \
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Dint_from_dbl_mantissa(dbl_valueA,dbl_valueB,exponent,destA,destB)
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