d7e02a9312
Most dma_map_ops implementations already had some issues with a NULL device, or did simply crash if one was fed to them. Now that we have cleaned up all the obvious offenders we can stop to pretend we support this mode. Signed-off-by: Christoph Hellwig <hch@lst.de>
825 lines
26 KiB
C
825 lines
26 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_DMA_MAPPING_H
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#define _LINUX_DMA_MAPPING_H
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#include <linux/sizes.h>
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#include <linux/string.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/dma-debug.h>
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#include <linux/dma-direction.h>
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#include <linux/scatterlist.h>
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#include <linux/bug.h>
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#include <linux/mem_encrypt.h>
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/**
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* List of possible attributes associated with a DMA mapping. The semantics
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* of each attribute should be defined in Documentation/DMA-attributes.txt.
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*
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* DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
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* forces all pending DMA writes to complete.
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*/
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#define DMA_ATTR_WRITE_BARRIER (1UL << 0)
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/*
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* DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
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* may be weakly ordered, that is that reads and writes may pass each other.
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*/
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#define DMA_ATTR_WEAK_ORDERING (1UL << 1)
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/*
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* DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
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* buffered to improve performance.
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*/
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#define DMA_ATTR_WRITE_COMBINE (1UL << 2)
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/*
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* DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
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* consistent or non-consistent memory as it sees fit.
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*/
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#define DMA_ATTR_NON_CONSISTENT (1UL << 3)
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/*
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* DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
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* virtual mapping for the allocated buffer.
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*/
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#define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
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/*
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* DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
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* the CPU cache for the given buffer assuming that it has been already
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* transferred to 'device' domain.
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*/
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#define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
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/*
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* DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
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* in physical memory.
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*/
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#define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
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/*
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* DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
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* that it's probably not worth the time to try to allocate memory to in a way
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* that gives better TLB efficiency.
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*/
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#define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
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/*
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* DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
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* allocation failure reports (similarly to __GFP_NOWARN).
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*/
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#define DMA_ATTR_NO_WARN (1UL << 8)
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/*
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* DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
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* accessible at an elevated privilege level (and ideally inaccessible or
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* at least read-only at lesser-privileged levels).
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*/
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#define DMA_ATTR_PRIVILEGED (1UL << 9)
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/*
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* A dma_addr_t can hold any valid DMA or bus address for the platform.
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* It can be given to a device to use as a DMA source or target. A CPU cannot
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* reference a dma_addr_t directly because there may be translation between
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* its physical address space and the bus address space.
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*/
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struct dma_map_ops {
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void* (*alloc)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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unsigned long attrs);
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void (*free)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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unsigned long attrs);
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int (*mmap)(struct device *, struct vm_area_struct *,
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void *, dma_addr_t, size_t,
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unsigned long attrs);
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int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
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dma_addr_t, size_t, unsigned long attrs);
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dma_addr_t (*map_page)(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs);
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void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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/*
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* map_sg returns 0 on error and a value > 0 on success.
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* It should never return a value < 0.
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*/
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int (*map_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs);
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void (*unmap_sg)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir,
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unsigned long attrs);
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dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*sync_single_for_cpu)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_single_for_device)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_sg_for_cpu)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir);
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void (*sync_sg_for_device)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir);
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void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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int (*dma_supported)(struct device *dev, u64 mask);
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u64 (*get_required_mask)(struct device *dev);
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size_t (*max_mapping_size)(struct device *dev);
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};
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#define DMA_MAPPING_ERROR (~(dma_addr_t)0)
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extern const struct dma_map_ops dma_virt_ops;
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extern const struct dma_map_ops dma_dummy_ops;
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#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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#define DMA_MASK_NONE 0x0ULL
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static inline int valid_dma_direction(int dma_direction)
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{
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return ((dma_direction == DMA_BIDIRECTIONAL) ||
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(dma_direction == DMA_TO_DEVICE) ||
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(dma_direction == DMA_FROM_DEVICE));
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}
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static inline int is_device_dma_capable(struct device *dev)
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{
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return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
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}
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#ifdef CONFIG_DMA_DECLARE_COHERENT
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/*
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* These three functions are only for dma allocator.
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* Don't use them in device drivers.
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*/
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int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
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dma_addr_t *dma_handle, void **ret);
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int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
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int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, size_t size, int *ret);
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void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle);
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int dma_release_from_global_coherent(int order, void *vaddr);
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int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
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size_t size, int *ret);
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#else
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#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
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#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
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#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
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static inline void *dma_alloc_from_global_coherent(ssize_t size,
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dma_addr_t *dma_handle)
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{
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return NULL;
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}
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static inline int dma_release_from_global_coherent(int order, void *vaddr)
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{
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return 0;
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}
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static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
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void *cpu_addr, size_t size,
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int *ret)
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{
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return 0;
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}
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#endif /* CONFIG_DMA_DECLARE_COHERENT */
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static inline bool dma_is_direct(const struct dma_map_ops *ops)
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{
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return likely(!ops);
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}
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/*
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* All the dma_direct_* declarations are here just for the indirect call bypass,
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* and must not be used directly drivers!
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*/
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dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir, unsigned long attrs);
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
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defined(CONFIG_SWIOTLB)
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void dma_direct_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir);
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void dma_direct_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir);
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#else
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static inline void dma_direct_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir)
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{
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}
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static inline void dma_direct_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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{
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}
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#endif
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#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
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defined(CONFIG_SWIOTLB)
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void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs);
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void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction dir, unsigned long attrs);
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void dma_direct_sync_single_for_cpu(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir);
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void dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir);
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#else
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static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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}
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static inline void dma_direct_unmap_sg(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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}
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static inline void dma_direct_sync_single_for_cpu(struct device *dev,
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dma_addr_t addr, size_t size, enum dma_data_direction dir)
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{
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}
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static inline void dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents, enum dma_data_direction dir)
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{
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}
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#endif
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size_t dma_direct_max_mapping_size(struct device *dev);
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#ifdef CONFIG_HAS_DMA
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#include <asm/dma-mapping.h>
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static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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if (dev->dma_ops)
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return dev->dma_ops;
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return get_arch_dma_ops(dev->bus);
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}
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static inline void set_dma_ops(struct device *dev,
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const struct dma_map_ops *dma_ops)
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{
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dev->dma_ops = dma_ops;
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}
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static inline dma_addr_t dma_map_page_attrs(struct device *dev,
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struct page *page, size_t offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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dma_addr_t addr;
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
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else
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addr = ops->map_page(dev, page, offset, size, dir, attrs);
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debug_dma_map_page(dev, page, offset, size, dir, addr);
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return addr;
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}
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static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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dma_direct_unmap_page(dev, addr, size, dir, attrs);
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else if (ops->unmap_page)
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ops->unmap_page(dev, addr, size, dir, attrs);
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debug_dma_unmap_page(dev, addr, size, dir);
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}
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/*
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* dma_maps_sg_attrs returns 0 on error and > 0 on success.
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* It should never return a value < 0.
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*/
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static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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int ents;
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
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else
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ents = ops->map_sg(dev, sg, nents, dir, attrs);
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BUG_ON(ents < 0);
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debug_dma_map_sg(dev, sg, nents, ents, dir);
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return ents;
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}
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static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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debug_dma_unmap_sg(dev, sg, nents, dir);
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if (dma_is_direct(ops))
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dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
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else if (ops->unmap_sg)
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ops->unmap_sg(dev, sg, nents, dir, attrs);
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}
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static inline dma_addr_t dma_map_resource(struct device *dev,
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phys_addr_t phys_addr,
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size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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dma_addr_t addr = DMA_MAPPING_ERROR;
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BUG_ON(!valid_dma_direction(dir));
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/* Don't allow RAM to be mapped */
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if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr))))
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return DMA_MAPPING_ERROR;
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if (dma_is_direct(ops))
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addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
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else if (ops->map_resource)
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addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
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debug_dma_map_resource(dev, phys_addr, size, dir, addr);
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return addr;
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}
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static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (!dma_is_direct(ops) && ops->unmap_resource)
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ops->unmap_resource(dev, addr, size, dir, attrs);
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debug_dma_unmap_resource(dev, addr, size, dir);
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}
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static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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dma_direct_sync_single_for_cpu(dev, addr, size, dir);
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else if (ops->sync_single_for_cpu)
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ops->sync_single_for_cpu(dev, addr, size, dir);
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debug_dma_sync_single_for_cpu(dev, addr, size, dir);
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size,
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enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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dma_direct_sync_single_for_device(dev, addr, size, dir);
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else if (ops->sync_single_for_device)
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ops->sync_single_for_device(dev, addr, size, dir);
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debug_dma_sync_single_for_device(dev, addr, size, dir);
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
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else if (ops->sync_sg_for_cpu)
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ops->sync_sg_for_cpu(dev, sg, nelems, dir);
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debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (dma_is_direct(ops))
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dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
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else if (ops->sync_sg_for_device)
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ops->sync_sg_for_device(dev, sg, nelems, dir);
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debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
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}
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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debug_dma_mapping_error(dev, dma_addr);
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if (dma_addr == DMA_MAPPING_ERROR)
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return -ENOMEM;
|
|
return 0;
|
|
}
|
|
|
|
void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
gfp_t flag, unsigned long attrs);
|
|
void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
|
|
dma_addr_t dma_handle, unsigned long attrs);
|
|
void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
gfp_t gfp, unsigned long attrs);
|
|
void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
|
|
dma_addr_t dma_handle);
|
|
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
|
enum dma_data_direction dir);
|
|
int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
unsigned long attrs);
|
|
int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
unsigned long attrs);
|
|
int dma_supported(struct device *dev, u64 mask);
|
|
int dma_set_mask(struct device *dev, u64 mask);
|
|
int dma_set_coherent_mask(struct device *dev, u64 mask);
|
|
u64 dma_get_required_mask(struct device *dev);
|
|
size_t dma_max_mapping_size(struct device *dev);
|
|
#else /* CONFIG_HAS_DMA */
|
|
static inline dma_addr_t dma_map_page_attrs(struct device *dev,
|
|
struct page *page, size_t offset, size_t size,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
return DMA_MAPPING_ERROR;
|
|
}
|
|
static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
}
|
|
static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
|
|
int nents, enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline void dma_unmap_sg_attrs(struct device *dev,
|
|
struct scatterlist *sg, int nents, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
}
|
|
static inline dma_addr_t dma_map_resource(struct device *dev,
|
|
phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
return DMA_MAPPING_ERROR;
|
|
}
|
|
static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
}
|
|
static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
}
|
|
static inline void dma_sync_single_for_device(struct device *dev,
|
|
dma_addr_t addr, size_t size, enum dma_data_direction dir)
|
|
{
|
|
}
|
|
static inline void dma_sync_sg_for_cpu(struct device *dev,
|
|
struct scatterlist *sg, int nelems, enum dma_data_direction dir)
|
|
{
|
|
}
|
|
static inline void dma_sync_sg_for_device(struct device *dev,
|
|
struct scatterlist *sg, int nelems, enum dma_data_direction dir)
|
|
{
|
|
}
|
|
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
{
|
|
return -ENOMEM;
|
|
}
|
|
static inline void *dma_alloc_attrs(struct device *dev, size_t size,
|
|
dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
|
|
{
|
|
return NULL;
|
|
}
|
|
static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
|
|
dma_addr_t dma_handle, unsigned long attrs)
|
|
{
|
|
}
|
|
static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
|
|
dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
|
|
{
|
|
return NULL;
|
|
}
|
|
static inline void dmam_free_coherent(struct device *dev, size_t size,
|
|
void *vaddr, dma_addr_t dma_handle)
|
|
{
|
|
}
|
|
static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
}
|
|
static inline int dma_get_sgtable_attrs(struct device *dev,
|
|
struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
|
|
size_t size, unsigned long attrs)
|
|
{
|
|
return -ENXIO;
|
|
}
|
|
static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
unsigned long attrs)
|
|
{
|
|
return -ENXIO;
|
|
}
|
|
static inline int dma_supported(struct device *dev, u64 mask)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline int dma_set_mask(struct device *dev, u64 mask)
|
|
{
|
|
return -EIO;
|
|
}
|
|
static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
|
|
{
|
|
return -EIO;
|
|
}
|
|
static inline u64 dma_get_required_mask(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline size_t dma_max_mapping_size(struct device *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_HAS_DMA */
|
|
|
|
static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
debug_dma_map_single(dev, ptr, size);
|
|
return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
|
|
size, dir, attrs);
|
|
}
|
|
|
|
static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
|
|
}
|
|
|
|
static inline void dma_sync_single_range_for_cpu(struct device *dev,
|
|
dma_addr_t addr, unsigned long offset, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
|
|
}
|
|
|
|
static inline void dma_sync_single_range_for_device(struct device *dev,
|
|
dma_addr_t addr, unsigned long offset, size_t size,
|
|
enum dma_data_direction dir)
|
|
{
|
|
return dma_sync_single_for_device(dev, addr + offset, size, dir);
|
|
}
|
|
|
|
#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
|
|
#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
|
|
#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
|
|
#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
|
|
#define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
|
|
#define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
|
|
#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
|
|
#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
|
|
|
|
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
unsigned long attrs);
|
|
|
|
void *dma_common_contiguous_remap(struct page *page, size_t size,
|
|
unsigned long vm_flags,
|
|
pgprot_t prot, const void *caller);
|
|
|
|
void *dma_common_pages_remap(struct page **pages, size_t size,
|
|
unsigned long vm_flags, pgprot_t prot,
|
|
const void *caller);
|
|
void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
|
|
|
|
int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot);
|
|
bool dma_in_atomic_pool(void *start, size_t size);
|
|
void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags);
|
|
bool dma_free_from_pool(void *start, size_t size);
|
|
|
|
int
|
|
dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr,
|
|
dma_addr_t dma_addr, size_t size, unsigned long attrs);
|
|
|
|
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
|
dma_addr_t *dma_handle, gfp_t gfp)
|
|
{
|
|
|
|
return dma_alloc_attrs(dev, size, dma_handle, gfp,
|
|
(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
|
|
}
|
|
|
|
static inline void dma_free_coherent(struct device *dev, size_t size,
|
|
void *cpu_addr, dma_addr_t dma_handle)
|
|
{
|
|
return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
|
|
}
|
|
|
|
|
|
static inline u64 dma_get_mask(struct device *dev)
|
|
{
|
|
if (dev->dma_mask && *dev->dma_mask)
|
|
return *dev->dma_mask;
|
|
return DMA_BIT_MASK(32);
|
|
}
|
|
|
|
/*
|
|
* Set both the DMA mask and the coherent DMA mask to the same thing.
|
|
* Note that we don't check the return value from dma_set_coherent_mask()
|
|
* as the DMA API guarantees that the coherent DMA mask can be set to
|
|
* the same or smaller than the streaming DMA mask.
|
|
*/
|
|
static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
|
|
{
|
|
int rc = dma_set_mask(dev, mask);
|
|
if (rc == 0)
|
|
dma_set_coherent_mask(dev, mask);
|
|
return rc;
|
|
}
|
|
|
|
/*
|
|
* Similar to the above, except it deals with the case where the device
|
|
* does not have dev->dma_mask appropriately setup.
|
|
*/
|
|
static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
|
|
{
|
|
dev->dma_mask = &dev->coherent_dma_mask;
|
|
return dma_set_mask_and_coherent(dev, mask);
|
|
}
|
|
|
|
#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
|
|
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
|
const struct iommu_ops *iommu, bool coherent);
|
|
#else
|
|
static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
|
|
u64 size, const struct iommu_ops *iommu, bool coherent)
|
|
{
|
|
}
|
|
#endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
|
|
|
|
#ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
|
|
void arch_teardown_dma_ops(struct device *dev);
|
|
#else
|
|
static inline void arch_teardown_dma_ops(struct device *dev)
|
|
{
|
|
}
|
|
#endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
|
|
|
|
static inline unsigned int dma_get_max_seg_size(struct device *dev)
|
|
{
|
|
if (dev->dma_parms && dev->dma_parms->max_segment_size)
|
|
return dev->dma_parms->max_segment_size;
|
|
return SZ_64K;
|
|
}
|
|
|
|
static inline int dma_set_max_seg_size(struct device *dev, unsigned int size)
|
|
{
|
|
if (dev->dma_parms) {
|
|
dev->dma_parms->max_segment_size = size;
|
|
return 0;
|
|
}
|
|
return -EIO;
|
|
}
|
|
|
|
static inline unsigned long dma_get_seg_boundary(struct device *dev)
|
|
{
|
|
if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
|
|
return dev->dma_parms->segment_boundary_mask;
|
|
return DMA_BIT_MASK(32);
|
|
}
|
|
|
|
static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
|
|
{
|
|
if (dev->dma_parms) {
|
|
dev->dma_parms->segment_boundary_mask = mask;
|
|
return 0;
|
|
}
|
|
return -EIO;
|
|
}
|
|
|
|
#ifndef dma_max_pfn
|
|
static inline unsigned long dma_max_pfn(struct device *dev)
|
|
{
|
|
return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset;
|
|
}
|
|
#endif
|
|
|
|
static inline int dma_get_cache_alignment(void)
|
|
{
|
|
#ifdef ARCH_DMA_MINALIGN
|
|
return ARCH_DMA_MINALIGN;
|
|
#endif
|
|
return 1;
|
|
}
|
|
|
|
#ifdef CONFIG_DMA_DECLARE_COHERENT
|
|
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
|
dma_addr_t device_addr, size_t size);
|
|
void dma_release_declared_memory(struct device *dev);
|
|
#else
|
|
static inline int
|
|
dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
|
dma_addr_t device_addr, size_t size)
|
|
{
|
|
return -ENOSYS;
|
|
}
|
|
|
|
static inline void
|
|
dma_release_declared_memory(struct device *dev)
|
|
{
|
|
}
|
|
#endif /* CONFIG_DMA_DECLARE_COHERENT */
|
|
|
|
static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
|
|
dma_addr_t *dma_handle, gfp_t gfp)
|
|
{
|
|
return dmam_alloc_attrs(dev, size, dma_handle, gfp,
|
|
(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
|
|
}
|
|
|
|
static inline void *dma_alloc_wc(struct device *dev, size_t size,
|
|
dma_addr_t *dma_addr, gfp_t gfp)
|
|
{
|
|
unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
|
|
|
|
if (gfp & __GFP_NOWARN)
|
|
attrs |= DMA_ATTR_NO_WARN;
|
|
|
|
return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
|
|
}
|
|
#ifndef dma_alloc_writecombine
|
|
#define dma_alloc_writecombine dma_alloc_wc
|
|
#endif
|
|
|
|
static inline void dma_free_wc(struct device *dev, size_t size,
|
|
void *cpu_addr, dma_addr_t dma_addr)
|
|
{
|
|
return dma_free_attrs(dev, size, cpu_addr, dma_addr,
|
|
DMA_ATTR_WRITE_COMBINE);
|
|
}
|
|
#ifndef dma_free_writecombine
|
|
#define dma_free_writecombine dma_free_wc
|
|
#endif
|
|
|
|
static inline int dma_mmap_wc(struct device *dev,
|
|
struct vm_area_struct *vma,
|
|
void *cpu_addr, dma_addr_t dma_addr,
|
|
size_t size)
|
|
{
|
|
return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
|
|
DMA_ATTR_WRITE_COMBINE);
|
|
}
|
|
#ifndef dma_mmap_writecombine
|
|
#define dma_mmap_writecombine dma_mmap_wc
|
|
#endif
|
|
|
|
#ifdef CONFIG_NEED_DMA_MAP_STATE
|
|
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
|
|
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
|
|
#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
|
|
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
|
|
#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
|
|
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
|
|
#else
|
|
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
|
|
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
|
|
#define dma_unmap_addr(PTR, ADDR_NAME) (0)
|
|
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
|
|
#define dma_unmap_len(PTR, LEN_NAME) (0)
|
|
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
|
|
#endif
|
|
|
|
#endif
|