2100b595b7
Errors that cannot be cleared (determined by reading REGERR register) are currently handled by masking it. Documentation states that REGERR "Checks which application/debug error sources are active" - it does not indicate that this is "interrupt status" - masked out status represented eventually in the irq line to MPU. For example: Lets say module 0 bit 8(0x100) was unclearable, we do the mask it from generating further errors. However in the following cases: a) bit 9 of Module 0 OR b) any bit of Module 1+ occur, the interrupt handler wrongly assumes that the raw interrupt status of module 0 bit 8 is the root cause of the interrupt, and returns. This causes unhandled interrupt and resultant infinite interrupts. Fix this scenario by storing the events we masked out and masking raw status with masked ones before identifying and handling the error. Reported-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Vaibhav Hiremath <hvaibhav@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| arm-cci.c | ||
| imx-weim.c | ||
| mvebu-mbus.c | ||
| omap-ocp2scp.c | ||
| omap_l3_noc.c | ||
| omap_l3_noc.h | ||
| omap_l3_smx.c | ||
| omap_l3_smx.h | ||