![Kumar Gala](/assets/img/avatar_default.png)
Added ppc_sys device and system definitions for PowerQUICC II devices. This will allow drivers for PQ2 to be proper platform device drivers. Which can be shared on PQ3 processors with the same peripherals. Signed-off-by: Matt McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
201 lines
5.4 KiB
C
201 lines
5.4 KiB
C
/*
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* arch/ppc/syslib/pq2_devices.c
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*
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* PQ2 System descriptions
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*
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <asm/ppc_sys.h>
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struct ppc_sys_spec *cur_ppc_sys_spec;
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struct ppc_sys_spec ppc_sys_specs[] = {
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/* below is a list of the 8260 family of processors */
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{
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.ppc_sys_name = "8250",
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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}
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},
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{
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.ppc_sys_name = "8255",
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 11,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
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MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
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MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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}
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},
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{
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.ppc_sys_name = "8260",
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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}
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},
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{
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.ppc_sys_name = "8264",
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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}
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},
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{
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.ppc_sys_name = "8265",
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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}
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},
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{
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.ppc_sys_name = "8266",
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.mask = 0x0000ff00,
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.value = 0x00000000,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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}
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},
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/* below is a list of the 8272 family of processors */
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{
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.ppc_sys_name = "8247",
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.mask = 0x0000ff00,
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.value = 0x00000d00,
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.num_devices = 10,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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MPC82xx_CPM_USB,
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},
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},
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{
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.ppc_sys_name = "8248",
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.mask = 0x0000ff00,
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.value = 0x00000c00,
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.num_devices = 11,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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MPC82xx_CPM_USB, MPC82xx_SEC1,
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},
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},
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{
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.ppc_sys_name = "8271",
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.mask = 0x0000ff00,
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.value = 0x00000d00,
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.num_devices = 10,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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MPC82xx_CPM_USB,
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},
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},
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{
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.ppc_sys_name = "8272",
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.mask = 0x0000ff00,
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.value = 0x00000c00,
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.num_devices = 11,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
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MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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MPC82xx_CPM_USB, MPC82xx_SEC1,
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},
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},
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/* below is a list of the 8280 family of processors */
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{
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.ppc_sys_name = "8270",
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.mask = 0x0000ff00,
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.value = 0x00000a00,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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},
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},
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{
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.ppc_sys_name = "8275",
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.mask = 0x0000ff00,
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.value = 0x00000a00,
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.num_devices = 12,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
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MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
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},
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},
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{
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.ppc_sys_name = "8280",
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.mask = 0x0000ff00,
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.value = 0x00000a00,
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.num_devices = 13,
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.device_list = (enum ppc_sys_devices[])
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{
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MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
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MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
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MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
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MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
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MPC82xx_CPM_I2C,
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},
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},
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{
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/* default match */
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.ppc_sys_name = "",
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.mask = 0x00000000,
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.value = 0x00000000,
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},
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};
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