74ba9207e1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 441 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
74 lines
2.3 KiB
C
74 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2009 Texas Instruments.
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*/
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#ifndef __ARCH_ARM_DAVINCI_SPI_H
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#define __ARCH_ARM_DAVINCI_SPI_H
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#include <linux/platform_data/edma.h>
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#define SPI_INTERN_CS 0xFF
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enum {
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SPI_VERSION_1, /* For DM355/DM365/DM6467 */
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SPI_VERSION_2, /* For DA8xx */
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};
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/**
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* davinci_spi_platform_data - Platform data for SPI master device on DaVinci
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*
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* @version: version of the SPI IP. Different DaVinci devices have slightly
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* varying versions of the same IP.
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* @num_chipselect: number of chipselects supported by this SPI master
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* @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
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* controller withn the SoC. Possible values are 0 and 1.
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* @cshold_bug: set this to true if the SPI controller on your chip requires
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* a write to CSHOLD bit in between transfers (like in DM355).
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* @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
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* device on the bus.
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*/
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struct davinci_spi_platform_data {
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u8 version;
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u8 num_chipselect;
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u8 intr_line;
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u8 prescaler_limit;
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bool cshold_bug;
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enum dma_event_q dma_event_q;
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};
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/**
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* davinci_spi_config - Per-chip-select configuration for SPI slave devices
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*
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* @wdelay: amount of delay between transmissions. Measured in number of
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* SPI module clocks.
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* @odd_parity: polarity of parity flag at the end of transmit data stream.
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* 0 - odd parity, 1 - even parity.
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* @parity_enable: enable transmission of parity at end of each transmit
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* data stream.
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* @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
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* @timer_disable: disable chip-select timers (setup and hold)
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* @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
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* @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
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* @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
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* in number of SPI clocks.
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* @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
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* number of SPI clocks.
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*/
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struct davinci_spi_config {
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u8 wdelay;
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u8 odd_parity;
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u8 parity_enable;
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#define SPI_IO_TYPE_INTR 0
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#define SPI_IO_TYPE_POLL 1
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#define SPI_IO_TYPE_DMA 2
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u8 io_type;
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u8 timer_disable;
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u8 c2tdelay;
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u8 t2cdelay;
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u8 t2edelay;
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u8 c2edelay;
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};
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#endif /* __ARCH_ARM_DAVINCI_SPI_H */
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