![Jesse Barnes](/assets/img/avatar_default.png)
The ring frequency scaling table tells the PCU to treat certain GPU frequencies as if they were a given CPU frequency for purposes of scaling the ring frequency. Normally the PCU will scale the ring frequency based on the CPU P-state, but with the table present, it will also take the GPU frequency into account. The main downside of keeping the ring frequency high while the CPU is at a low frequency (or asleep altogether) is increased power consumption. But then if you're keeping your GPU busy, you probably want the extra performance. v2: - add units to debug table header (from Eric) - use tsc_khz as a fallback if the cpufreq driver doesn't give us a freq (from Chris) v3: - fix comments & debug output - remove unneeded force wake get/put Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Tested-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
352 lines
12 KiB
C
352 lines
12 KiB
C
/*
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* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
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* Copyright (c) 2007-2008 Intel Corporation
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* Jesse Barnes <jesse.barnes@intel.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef __INTEL_DRV_H__
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#define __INTEL_DRV_H__
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#include <linux/i2c.h>
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#include "i915_drv.h"
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#include "drm_crtc.h"
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#include "drm_crtc_helper.h"
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#include "drm_fb_helper.h"
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#define _wait_for(COND, MS, W) ({ \
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unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
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int ret__ = 0; \
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while (! (COND)) { \
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if (time_after(jiffies, timeout__)) { \
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ret__ = -ETIMEDOUT; \
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break; \
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} \
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if (W && !(in_atomic() || in_dbg_master())) msleep(W); \
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} \
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ret__; \
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})
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#define wait_for(COND, MS) _wait_for(COND, MS, 1)
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#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
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#define MSLEEP(x) do { \
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if (in_dbg_master()) \
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mdelay(x); \
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else \
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msleep(x); \
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} while(0)
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#define KHz(x) (1000*x)
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#define MHz(x) KHz(1000*x)
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/*
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* Display related stuff
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*/
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/* store information about an Ixxx DVO */
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/* The i830->i865 use multiple DVOs with multiple i2cs */
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/* the i915, i945 have a single sDVO i2c bus - which is different */
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#define MAX_OUTPUTS 6
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/* maximum connectors per crtcs in the mode set */
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#define INTELFB_CONN_LIMIT 4
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#define INTEL_I2C_BUS_DVO 1
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#define INTEL_I2C_BUS_SDVO 2
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/* these are outputs from the chip - integrated only
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external chips are via DVO or SDVO output */
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#define INTEL_OUTPUT_UNUSED 0
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#define INTEL_OUTPUT_ANALOG 1
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#define INTEL_OUTPUT_DVO 2
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#define INTEL_OUTPUT_SDVO 3
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#define INTEL_OUTPUT_LVDS 4
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#define INTEL_OUTPUT_TVOUT 5
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#define INTEL_OUTPUT_HDMI 6
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#define INTEL_OUTPUT_DISPLAYPORT 7
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#define INTEL_OUTPUT_EDP 8
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/* Intel Pipe Clone Bit */
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#define INTEL_HDMIB_CLONE_BIT 1
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#define INTEL_HDMIC_CLONE_BIT 2
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#define INTEL_HDMID_CLONE_BIT 3
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#define INTEL_HDMIE_CLONE_BIT 4
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#define INTEL_HDMIF_CLONE_BIT 5
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#define INTEL_SDVO_NON_TV_CLONE_BIT 6
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#define INTEL_SDVO_TV_CLONE_BIT 7
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#define INTEL_SDVO_LVDS_CLONE_BIT 8
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#define INTEL_ANALOG_CLONE_BIT 9
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#define INTEL_TV_CLONE_BIT 10
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#define INTEL_DP_B_CLONE_BIT 11
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#define INTEL_DP_C_CLONE_BIT 12
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#define INTEL_DP_D_CLONE_BIT 13
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#define INTEL_LVDS_CLONE_BIT 14
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#define INTEL_DVO_TMDS_CLONE_BIT 15
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#define INTEL_DVO_LVDS_CLONE_BIT 16
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#define INTEL_EDP_CLONE_BIT 17
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#define INTEL_DVO_CHIP_NONE 0
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#define INTEL_DVO_CHIP_LVDS 1
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#define INTEL_DVO_CHIP_TMDS 2
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#define INTEL_DVO_CHIP_TVOUT 4
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/* drm_display_mode->private_flags */
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#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
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#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
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static inline void
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intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
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int multiplier)
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{
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mode->clock *= multiplier;
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mode->private_flags |= multiplier;
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}
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static inline int
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intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
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{
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return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
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}
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struct intel_framebuffer {
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struct drm_framebuffer base;
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struct drm_i915_gem_object *obj;
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};
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struct intel_fbdev {
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struct drm_fb_helper helper;
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struct intel_framebuffer ifb;
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struct list_head fbdev_list;
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struct drm_display_mode *our_mode;
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};
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struct intel_encoder {
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struct drm_encoder base;
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int type;
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bool needs_tv_clock;
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void (*hot_plug)(struct intel_encoder *);
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int crtc_mask;
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int clone_mask;
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};
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struct intel_connector {
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struct drm_connector base;
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struct intel_encoder *encoder;
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};
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struct intel_crtc {
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struct drm_crtc base;
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enum pipe pipe;
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enum plane plane;
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u8 lut_r[256], lut_g[256], lut_b[256];
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int dpms_mode;
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bool active; /* is the crtc on? independent of the dpms mode */
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bool busy; /* is scanout buffer being updated frequently? */
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struct timer_list idle_timer;
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bool lowfreq_avail;
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struct intel_overlay *overlay;
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struct intel_unpin_work *unpin_work;
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int fdi_lanes;
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struct drm_i915_gem_object *cursor_bo;
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uint32_t cursor_addr;
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int16_t cursor_x, cursor_y;
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int16_t cursor_width, cursor_height;
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bool cursor_visible;
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};
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#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
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#define to_intel_connector(x) container_of(x, struct intel_connector, base)
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#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
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#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
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#define DIP_TYPE_AVI 0x82
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#define DIP_VERSION_AVI 0x2
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#define DIP_LEN_AVI 13
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struct dip_infoframe {
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uint8_t type; /* HB0 */
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uint8_t ver; /* HB1 */
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uint8_t len; /* HB2 - body len, not including checksum */
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uint8_t ecc; /* Header ECC */
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uint8_t checksum; /* PB0 */
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union {
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struct {
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/* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
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uint8_t Y_A_B_S;
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/* PB2 - C 7:6, M 5:4, R 3:0 */
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uint8_t C_M_R;
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/* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
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uint8_t ITC_EC_Q_SC;
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/* PB4 - VIC 6:0 */
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uint8_t VIC;
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/* PB5 - PR 3:0 */
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uint8_t PR;
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/* PB6 to PB13 */
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uint16_t top_bar_end;
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uint16_t bottom_bar_start;
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uint16_t left_bar_end;
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uint16_t right_bar_start;
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} avi;
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uint8_t payload[27];
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} __attribute__ ((packed)) body;
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} __attribute__((packed));
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static inline struct drm_crtc *
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intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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return dev_priv->pipe_to_crtc_mapping[pipe];
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}
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static inline struct drm_crtc *
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intel_get_crtc_for_plane(struct drm_device *dev, int plane)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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return dev_priv->plane_to_crtc_mapping[plane];
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}
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struct intel_unpin_work {
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struct work_struct work;
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struct drm_device *dev;
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struct drm_i915_gem_object *old_fb_obj;
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struct drm_i915_gem_object *pending_flip_obj;
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struct drm_pending_vblank_event *event;
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int pending;
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bool enable_stall_check;
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};
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int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
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extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
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extern void intel_attach_force_audio_property(struct drm_connector *connector);
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extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
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extern void intel_crt_init(struct drm_device *dev);
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extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
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void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
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extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
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extern void intel_dvo_init(struct drm_device *dev);
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extern void intel_tv_init(struct drm_device *dev);
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extern void intel_mark_busy(struct drm_device *dev,
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struct drm_i915_gem_object *obj);
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extern bool intel_lvds_init(struct drm_device *dev);
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extern void intel_dp_init(struct drm_device *dev, int dp_reg);
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void
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intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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extern bool intel_dpd_is_edp(struct drm_device *dev);
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extern void intel_edp_link_config (struct intel_encoder *, int *, int *);
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extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
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/* intel_panel.c */
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extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
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struct drm_display_mode *adjusted_mode);
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extern void intel_pch_panel_fitting(struct drm_device *dev,
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int fitting_mode,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
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extern u32 intel_panel_get_backlight(struct drm_device *dev);
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extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
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extern void intel_panel_setup_backlight(struct drm_device *dev);
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extern void intel_panel_enable_backlight(struct drm_device *dev);
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extern void intel_panel_disable_backlight(struct drm_device *dev);
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extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
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extern void intel_crtc_load_lut(struct drm_crtc *crtc);
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extern void intel_encoder_prepare (struct drm_encoder *encoder);
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extern void intel_encoder_commit (struct drm_encoder *encoder);
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extern void intel_encoder_destroy(struct drm_encoder *encoder);
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static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
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{
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return to_intel_connector(connector)->encoder;
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}
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extern void intel_connector_attach_encoder(struct intel_connector *connector,
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struct intel_encoder *encoder);
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extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
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extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
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struct drm_crtc *crtc);
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int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
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extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
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struct intel_load_detect_pipe {
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struct drm_framebuffer *release_fb;
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bool load_detect_temp;
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int dpms_mode;
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};
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extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
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struct drm_connector *connector,
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struct drm_display_mode *mode,
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struct intel_load_detect_pipe *old);
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extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
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struct drm_connector *connector,
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struct intel_load_detect_pipe *old);
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extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB);
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extern int intel_sdvo_supports_hotplug(struct drm_connector *connector);
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extern void intel_sdvo_set_hotplug(struct drm_connector *connector, int enable);
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extern void intelfb_restore(void);
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extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
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u16 blue, int regno);
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extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
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u16 *blue, int regno);
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extern void intel_enable_clock_gating(struct drm_device *dev);
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extern void ironlake_enable_drps(struct drm_device *dev);
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extern void ironlake_disable_drps(struct drm_device *dev);
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extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
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extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
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extern void gen6_disable_rps(struct drm_device *dev);
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extern void intel_init_emon(struct drm_device *dev);
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extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
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struct drm_i915_gem_object *obj,
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struct intel_ring_buffer *pipelined);
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extern int intel_framebuffer_init(struct drm_device *dev,
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struct intel_framebuffer *ifb,
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struct drm_mode_fb_cmd *mode_cmd,
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struct drm_i915_gem_object *obj);
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extern int intel_fbdev_init(struct drm_device *dev);
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extern void intel_fbdev_fini(struct drm_device *dev);
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extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
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extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
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extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
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extern void intel_setup_overlay(struct drm_device *dev);
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extern void intel_cleanup_overlay(struct drm_device *dev);
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extern int intel_overlay_switch_off(struct intel_overlay *overlay);
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extern int intel_overlay_put_image(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern int intel_overlay_attrs(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern void intel_fb_output_poll_changed(struct drm_device *dev);
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extern void intel_fb_restore_mode(struct drm_device *dev);
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extern void intel_init_clock_gating(struct drm_device *dev);
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#endif /* __INTEL_DRV_H__ */
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