684 lines
18 KiB
C
684 lines
18 KiB
C
/*
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* Cadence High-Definition Multimedia Interface (HDMI) driver
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*
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* Copyright (C) 2019 NXP Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <drm/bridge/cdns-mhdp-common.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_encoder_slave.h>
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#include <drm/drm_of.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_scdc_helper.h>
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#include <drm/drmP.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/hdmi.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mutex.h>
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#include <linux/of_device.h>
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static void hdmi_sink_config(struct cdns_mhdp_device *mhdp)
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{
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struct drm_scdc *scdc = &mhdp->connector.base.display_info.hdmi.scdc;
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u8 buff = 0;
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/* Default work in HDMI1.4 */
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mhdp->hdmi.hdmi_type = MODE_HDMI_1_4;
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/* check sink support SCDC or not */
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if (scdc->supported != true) {
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DRM_INFO("Sink Not Support SCDC\n");
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return;
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}
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if (mhdp->hdmi.char_rate > 340000) {
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/*
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* TMDS Character Rate above 340MHz should working in HDMI2.0
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* Enable scrambling and TMDS_Bit_Clock_Ratio
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*/
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buff = SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 | SCDC_SCRAMBLING_ENABLE;
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mhdp->hdmi.hdmi_type = MODE_HDMI_2_0;
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} else if (scdc->scrambling.low_rates) {
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/*
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* Enable scrambling and HDMI2.0 when scrambling capability of sink
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* be indicated in the HF-VSDB LTE_340Mcsc_scramble bit
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*/
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buff = SCDC_SCRAMBLING_ENABLE;
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mhdp->hdmi.hdmi_type = MODE_HDMI_2_0;
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}
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/* TMDS config */
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cdns_hdmi_scdc_write(mhdp, 0x20, buff);
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}
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static void hdmi_lanes_config(struct cdns_mhdp_device *mhdp)
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{
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/* Line swaping */
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cdns_mhdp_reg_write(mhdp, LANES_CONFIG, 0x00400000 | mhdp->lane_mapping);
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}
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static int hdmi_avi_info_set(struct cdns_mhdp_device *mhdp,
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struct drm_display_mode *mode)
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{
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struct hdmi_avi_infoframe frame;
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int format = mhdp->video_info.color_fmt;
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struct drm_connector_state *conn_state = mhdp->connector.base.state;
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struct drm_display_mode *adj_mode;
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enum hdmi_quantization_range qr;
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u8 buf[32];
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int ret;
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/* Initialise info frame from DRM mode */
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drm_hdmi_avi_infoframe_from_display_mode(&frame, &mhdp->connector.base,
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mode);
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switch (format) {
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case YCBCR_4_4_4:
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frame.colorspace = HDMI_COLORSPACE_YUV444;
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break;
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case YCBCR_4_2_2:
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frame.colorspace = HDMI_COLORSPACE_YUV422;
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break;
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case YCBCR_4_2_0:
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frame.colorspace = HDMI_COLORSPACE_YUV420;
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break;
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default:
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frame.colorspace = HDMI_COLORSPACE_RGB;
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break;
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}
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drm_hdmi_avi_infoframe_colorspace(&frame, conn_state);
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adj_mode = &mhdp->bridge.base.encoder->crtc->state->adjusted_mode;
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qr = drm_default_rgb_quant_range(adj_mode);
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drm_hdmi_avi_infoframe_quant_range(&frame, &mhdp->connector.base,
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adj_mode, qr);
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ret = hdmi_avi_infoframe_check(&frame);
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if (WARN_ON(ret))
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return false;
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ret = hdmi_avi_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1);
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if (ret < 0) {
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DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
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return -1;
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}
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buf[0] = 0;
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cdns_mhdp_infoframe_set(mhdp, 0, sizeof(buf), buf, HDMI_INFOFRAME_TYPE_AVI);
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return 0;
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}
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static void hdmi_vendor_info_set(struct cdns_mhdp_device *mhdp,
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struct drm_display_mode *mode)
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{
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struct hdmi_vendor_infoframe frame;
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u8 buf[32];
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int ret;
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/* Initialise vendor frame from DRM mode */
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ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame, &mhdp->connector.base, mode);
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if (ret < 0) {
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DRM_INFO("No vendor infoframe\n");
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return;
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}
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ret = hdmi_vendor_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1);
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if (ret < 0) {
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DRM_WARN("Unable to pack vendor infoframe: %d\n", ret);
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return;
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}
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buf[0] = 0;
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cdns_mhdp_infoframe_set(mhdp, 3, sizeof(buf), buf, HDMI_INFOFRAME_TYPE_VENDOR);
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}
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static void hdmi_drm_info_set(struct cdns_mhdp_device *mhdp)
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{
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struct drm_connector_state *conn_state;
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struct hdmi_drm_infoframe frame;
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u8 buf[32];
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int ret;
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conn_state = mhdp->connector.base.state;
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if (!conn_state->hdr_output_metadata)
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return;
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ret = drm_hdmi_infoframe_set_hdr_metadata(&frame, conn_state);
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if (ret < 0) {
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DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n");
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return;
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}
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ret = hdmi_drm_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1);
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if (ret < 0) {
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DRM_DEBUG_KMS("couldn't pack HDR infoframe\n");
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return;
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}
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buf[0] = 0;
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cdns_mhdp_infoframe_set(mhdp, 3, sizeof(buf),
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buf, HDMI_INFOFRAME_TYPE_DRM);
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}
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void cdns_hdmi_mode_set(struct cdns_mhdp_device *mhdp)
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{
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struct drm_display_mode *mode = &mhdp->mode;
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int ret;
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hdmi_lanes_config(mhdp);
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cdns_mhdp_plat_call(mhdp, pclk_rate);
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/* delay for HDMI FW stable after pixel clock relock */
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msleep(20);
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cdns_mhdp_plat_call(mhdp, phy_set);
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hdmi_sink_config(mhdp);
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ret = cdns_hdmi_ctrl_init(mhdp, mhdp->hdmi.hdmi_type, mhdp->hdmi.char_rate);
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if (ret < 0) {
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DRM_ERROR("%s, ret = %d\n", __func__, ret);
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return;
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}
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/* Config GCP */
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if (mhdp->video_info.color_depth == 8)
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cdns_hdmi_disable_gcp(mhdp);
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else
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cdns_hdmi_enable_gcp(mhdp);
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ret = hdmi_avi_info_set(mhdp, mode);
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if (ret < 0) {
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DRM_ERROR("%s ret = %d\n", __func__, ret);
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return;
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}
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/* vendor info frame is enable only when HDMI1.4 4K mode */
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hdmi_vendor_info_set(mhdp, mode);
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hdmi_drm_info_set(mhdp);
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ret = cdns_hdmi_mode_config(mhdp, mode, &mhdp->video_info);
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if (ret < 0) {
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DRM_ERROR("CDN_API_HDMITX_SetVic_blocking ret = %d\n", ret);
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return;
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}
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}
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static enum drm_connector_status
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cdns_hdmi_connector_detect(struct drm_connector *connector, bool force)
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{
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struct cdns_mhdp_device *mhdp =
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container_of(connector, struct cdns_mhdp_device, connector.base);
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u8 hpd = 0xf;
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hpd = cdns_mhdp_read_hpd(mhdp);
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if (hpd == 1)
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/* Cable Connected */
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return connector_status_connected;
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else if (hpd == 0)
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/* Cable Disconnedted */
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return connector_status_disconnected;
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else {
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/* Cable status unknown */
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DRM_INFO("Unknow cable status, hdp=%u\n", hpd);
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return connector_status_unknown;
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}
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}
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static int cdns_hdmi_connector_get_modes(struct drm_connector *connector)
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{
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struct cdns_mhdp_device *mhdp =
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container_of(connector, struct cdns_mhdp_device, connector.base);
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int num_modes = 0;
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struct edid *edid;
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edid = drm_do_get_edid(&mhdp->connector.base,
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cdns_hdmi_get_edid_block, mhdp);
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if (edid) {
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dev_info(mhdp->dev, "%x,%x,%x,%x,%x,%x,%x,%x\n",
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edid->header[0], edid->header[1],
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edid->header[2], edid->header[3],
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edid->header[4], edid->header[5],
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edid->header[6], edid->header[7]);
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drm_connector_update_edid_property(connector, edid);
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num_modes = drm_add_edid_modes(connector, edid);
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kfree(edid);
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}
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if (num_modes == 0)
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DRM_ERROR("Invalid edid\n");
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return num_modes;
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}
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static bool blob_equal(const struct drm_property_blob *a,
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const struct drm_property_blob *b)
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{
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if (a && b)
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return a->length == b->length &&
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!memcmp(a->data, b->data, a->length);
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return !a == !b;
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}
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static int cdns_hdmi_connector_atomic_check(struct drm_connector *connector,
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struct drm_atomic_state *state)
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{
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struct drm_connector_state *new_con_state =
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drm_atomic_get_new_connector_state(state, connector);
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struct drm_connector_state *old_con_state =
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drm_atomic_get_old_connector_state(state, connector);
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struct drm_crtc *crtc = new_con_state->crtc;
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struct drm_crtc_state *new_crtc_state;
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if (!blob_equal(new_con_state->hdr_output_metadata,
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old_con_state->hdr_output_metadata) ||
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new_con_state->colorspace != old_con_state->colorspace) {
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new_crtc_state = drm_atomic_get_crtc_state(state, crtc);
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if (IS_ERR(new_crtc_state))
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return PTR_ERR(new_crtc_state);
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new_crtc_state->mode_changed =
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!new_con_state->hdr_output_metadata ||
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!old_con_state->hdr_output_metadata ||
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new_con_state->colorspace != old_con_state->colorspace;
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}
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return 0;
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}
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static const struct drm_connector_funcs cdns_hdmi_connector_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.detect = cdns_hdmi_connector_detect,
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.destroy = drm_connector_cleanup,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static const struct drm_connector_helper_funcs cdns_hdmi_connector_helper_funcs = {
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.get_modes = cdns_hdmi_connector_get_modes,
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.atomic_check = cdns_hdmi_connector_atomic_check,
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};
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static int cdns_hdmi_bridge_attach(struct drm_bridge *bridge)
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{
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struct cdns_mhdp_device *mhdp = bridge->driver_private;
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struct drm_mode_config *config = &bridge->dev->mode_config;
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struct drm_encoder *encoder = bridge->encoder;
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struct drm_connector *connector = &mhdp->connector.base;
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connector->interlace_allowed = 1;
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connector->polled = DRM_CONNECTOR_POLL_HPD;
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drm_connector_helper_add(connector, &cdns_hdmi_connector_helper_funcs);
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drm_connector_init(bridge->dev, connector, &cdns_hdmi_connector_funcs,
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DRM_MODE_CONNECTOR_HDMIA);
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if (!strncmp("imx8mq-hdmi", mhdp->plat_data->plat_name, 11)) {
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drm_object_attach_property(&connector->base,
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config->hdr_output_metadata_property,
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0);
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if (!drm_mode_create_colorspace_property(connector))
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drm_object_attach_property(&connector->base,
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connector->colorspace_property,
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0);
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}
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drm_connector_attach_encoder(connector, encoder);
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return 0;
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}
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static enum drm_mode_status
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cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
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const struct drm_display_mode *mode)
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{
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struct cdns_mhdp_device *mhdp = bridge->driver_private;
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enum drm_mode_status mode_status = MODE_OK;
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int ret;
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/* We don't support double-clocked and Interlaced modes */
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if (mode->flags & DRM_MODE_FLAG_DBLCLK ||
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mode->flags & DRM_MODE_FLAG_INTERLACE)
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return MODE_BAD;
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/* MAX support pixel clock rate 594MHz */
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if (mode->clock > 594000)
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return MODE_CLOCK_HIGH;
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/* 4096x2160 is not supported */
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if (mode->hdisplay > 3840 || mode->vdisplay > 2160)
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return MODE_BAD_HVALUE;
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mhdp->valid_mode = mode;
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ret = cdns_mhdp_plat_call(mhdp, phy_video_valid);
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if (ret == false)
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return MODE_CLOCK_RANGE;
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return mode_status;
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}
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static void cdns_hdmi_bridge_mode_set(struct drm_bridge *bridge,
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const struct drm_display_mode *orig_mode,
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const struct drm_display_mode *mode)
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{
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struct cdns_mhdp_device *mhdp = bridge->driver_private;
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struct video_info *video = &mhdp->video_info;
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video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
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video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
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DRM_INFO("Mode: %dx%dp%d\n", mode->hdisplay, mode->vdisplay, mode->clock);
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memcpy(&mhdp->mode, mode, sizeof(struct drm_display_mode));
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mutex_lock(&mhdp->lock);
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cdns_hdmi_mode_set(mhdp);
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mutex_unlock(&mhdp->lock);
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}
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bool cdns_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct cdns_mhdp_device *mhdp = bridge->driver_private;
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struct drm_display_info *di = &mhdp->connector.base.display_info;
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struct video_info *video = &mhdp->video_info;
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int vic = drm_match_cea_mode(mode);
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video->color_depth = 8;
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video->color_fmt = PXL_RGB;
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/* for all other platforms, other than imx8mq */
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if (strncmp("imx8mq-hdmi", mhdp->plat_data->plat_name, 11)) {
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if (di->bpc == 10 || di->bpc == 6)
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video->color_depth = di->bpc;
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return true;
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}
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/* imx8mq */
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if (vic == 97 || vic == 96) {
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if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36)
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video->color_depth = 12;
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else if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30)
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video->color_depth = 10;
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if (drm_mode_is_420_only(di, mode) ||
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(drm_mode_is_420_also(di, mode) &&
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video->color_depth > 8)) {
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video->color_fmt = YCBCR_4_2_0;
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adjusted_mode->private_flags = 1;
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return true;
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}
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video->color_depth = 8;
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return true;
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}
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/* Any defined maximum tmds clock limit we must not exceed*/
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if ((di->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_36) &&
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(mode->clock * 3 / 2 <= di->max_tmds_clock))
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video->color_depth = 12;
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else if ((di->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
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(mode->clock * 5 / 4 <= di->max_tmds_clock))
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video->color_depth = 10;
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/* 10-bit color depth for the following modes is not supported */
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if ((vic == 95 || vic == 94 || vic == 93) && video->color_depth == 10)
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video->color_depth = 8;
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return true;
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}
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static const struct drm_bridge_funcs cdns_hdmi_bridge_funcs = {
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.attach = cdns_hdmi_bridge_attach,
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.mode_set = cdns_hdmi_bridge_mode_set,
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.mode_valid = cdns_hdmi_bridge_mode_valid,
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.mode_fixup = cdns_hdmi_bridge_mode_fixup,
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};
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static void hotplug_work_func(struct work_struct *work)
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{
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struct cdns_mhdp_device *mhdp = container_of(work,
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struct cdns_mhdp_device, hotplug_work.work);
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struct drm_connector *connector = &mhdp->connector.base;
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drm_helper_hpd_irq_event(connector->dev);
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if (connector->status == connector_status_connected) {
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DRM_INFO("HDMI Cable Plug In\n");
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/* reset video mode after cable plugin */
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mutex_lock(&mhdp->lock);
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cdns_hdmi_mode_set(mhdp);
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mutex_unlock(&mhdp->lock);
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enable_irq(mhdp->irq[IRQ_OUT]);
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} else if (connector->status == connector_status_disconnected) {
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/* Cable Disconnedted */
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DRM_INFO("HDMI Cable Plug Out\n");
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enable_irq(mhdp->irq[IRQ_IN]);
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}
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}
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static irqreturn_t cdns_hdmi_irq_thread(int irq, void *data)
|
|
{
|
|
struct cdns_mhdp_device *mhdp = data;
|
|
|
|
disable_irq_nosync(irq);
|
|
|
|
mod_delayed_work(system_wq, &mhdp->hotplug_work,
|
|
msecs_to_jiffies(HOTPLUG_DEBOUNCE_MS));
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void cdns_hdmi_parse_dt(struct cdns_mhdp_device *mhdp)
|
|
{
|
|
struct device_node *of_node = mhdp->dev->of_node;
|
|
int ret;
|
|
|
|
ret = of_property_read_u32(of_node, "lane-mapping", &mhdp->lane_mapping);
|
|
if (ret) {
|
|
mhdp->lane_mapping = 0xc6;
|
|
dev_warn(mhdp->dev, "Failed to get lane_mapping - using default 0xc6\n");
|
|
}
|
|
dev_info(mhdp->dev, "lane-mapping 0x%02x\n", mhdp->lane_mapping);
|
|
}
|
|
|
|
static int __cdns_hdmi_probe(struct platform_device *pdev,
|
|
struct cdns_mhdp_device *mhdp)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct platform_device_info pdevinfo;
|
|
struct resource *iores = NULL;
|
|
int ret;
|
|
|
|
mutex_init(&mhdp->lock);
|
|
mutex_init(&mhdp->iolock);
|
|
|
|
INIT_DELAYED_WORK(&mhdp->hotplug_work, hotplug_work_func);
|
|
|
|
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
mhdp->regs_base = devm_ioremap(dev, iores->start, resource_size(iores));
|
|
if (IS_ERR(mhdp->regs_base)) {
|
|
dev_err(dev, "No regs_base memory\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* sec register base */
|
|
iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
|
mhdp->regs_sec = devm_ioremap(dev, iores->start, resource_size(iores));
|
|
if (IS_ERR(mhdp->regs_sec)) {
|
|
dev_err(dev, "No regs_sec memory\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
mhdp->irq[IRQ_IN] = platform_get_irq_byname(pdev, "plug_in");
|
|
if (mhdp->irq[IRQ_IN] < 0) {
|
|
dev_info(dev, "No plug_in irq number\n");
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
mhdp->irq[IRQ_OUT] = platform_get_irq_byname(pdev, "plug_out");
|
|
if (mhdp->irq[IRQ_OUT] < 0) {
|
|
dev_info(dev, "No plug_out irq number\n");
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
cdns_mhdp_plat_call(mhdp, power_on);
|
|
|
|
/* Initialize FW */
|
|
cdns_mhdp_plat_call(mhdp, firmware_init);
|
|
|
|
/* HDMI FW alive check */
|
|
ret = cdns_mhdp_check_alive(mhdp);
|
|
if (ret == false) {
|
|
dev_err(dev, "NO HDMI FW running\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
/* Enable Hotplug Detect thread */
|
|
irq_set_status_flags(mhdp->irq[IRQ_IN], IRQ_NOAUTOEN);
|
|
ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_IN],
|
|
NULL, cdns_hdmi_irq_thread,
|
|
IRQF_ONESHOT, dev_name(dev),
|
|
mhdp);
|
|
if (ret < 0) {
|
|
dev_err(dev, "can't claim irq %d\n",
|
|
mhdp->irq[IRQ_IN]);
|
|
return -EINVAL;
|
|
}
|
|
|
|
irq_set_status_flags(mhdp->irq[IRQ_OUT], IRQ_NOAUTOEN);
|
|
ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_OUT],
|
|
NULL, cdns_hdmi_irq_thread,
|
|
IRQF_ONESHOT, dev_name(dev),
|
|
mhdp);
|
|
if (ret < 0) {
|
|
dev_err(dev, "can't claim irq %d\n",
|
|
mhdp->irq[IRQ_OUT]);
|
|
return -EINVAL;
|
|
}
|
|
|
|
cdns_hdmi_parse_dt(mhdp);
|
|
|
|
if (cdns_mhdp_read_hpd(mhdp))
|
|
enable_irq(mhdp->irq[IRQ_OUT]);
|
|
else
|
|
enable_irq(mhdp->irq[IRQ_IN]);
|
|
|
|
mhdp->bridge.base.driver_private = mhdp;
|
|
mhdp->bridge.base.funcs = &cdns_hdmi_bridge_funcs;
|
|
#ifdef CONFIG_OF
|
|
mhdp->bridge.base.of_node = dev->of_node;
|
|
#endif
|
|
|
|
memset(&pdevinfo, 0, sizeof(pdevinfo));
|
|
pdevinfo.parent = dev;
|
|
pdevinfo.id = PLATFORM_DEVID_AUTO;
|
|
|
|
dev_set_drvdata(dev, mhdp);
|
|
|
|
/* register audio driver */
|
|
cdns_mhdp_register_audio_driver(dev);
|
|
|
|
/* register cec driver */
|
|
#ifdef CONFIG_DRM_CDNS_HDMI_CEC
|
|
cdns_mhdp_register_cec_driver(dev);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __cdns_hdmi_remove(struct cdns_mhdp_device *mhdp)
|
|
{
|
|
/* unregister cec driver */
|
|
#ifdef CONFIG_DRM_CDNS_HDMI_CEC
|
|
cdns_mhdp_unregister_cec_driver(mhdp->dev);
|
|
#endif
|
|
cdns_mhdp_unregister_audio_driver(mhdp->dev);
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Probe/remove API, used from platforms based on the DRM bridge API.
|
|
*/
|
|
int cdns_hdmi_probe(struct platform_device *pdev,
|
|
struct cdns_mhdp_device *mhdp)
|
|
{
|
|
int ret;
|
|
|
|
ret = __cdns_hdmi_probe(pdev, mhdp);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
drm_bridge_add(&mhdp->bridge.base);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cdns_hdmi_probe);
|
|
|
|
void cdns_hdmi_remove(struct platform_device *pdev)
|
|
{
|
|
struct cdns_mhdp_device *mhdp = platform_get_drvdata(pdev);
|
|
|
|
drm_bridge_remove(&mhdp->bridge.base);
|
|
|
|
__cdns_hdmi_remove(mhdp);
|
|
}
|
|
EXPORT_SYMBOL_GPL(cdns_hdmi_remove);
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Bind/unbind API, used from platforms based on the component framework.
|
|
*/
|
|
int cdns_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder,
|
|
struct cdns_mhdp_device *mhdp)
|
|
{
|
|
int ret;
|
|
|
|
ret = __cdns_hdmi_probe(pdev, mhdp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = drm_bridge_attach(encoder, &mhdp->bridge.base, NULL);
|
|
if (ret) {
|
|
cdns_hdmi_remove(pdev);
|
|
DRM_ERROR("Failed to initialize bridge with drm\n");
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cdns_hdmi_bind);
|
|
|
|
void cdns_hdmi_unbind(struct device *dev)
|
|
{
|
|
struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev);
|
|
|
|
__cdns_hdmi_remove(mhdp);
|
|
}
|
|
EXPORT_SYMBOL_GPL(cdns_hdmi_unbind);
|
|
|
|
MODULE_AUTHOR("Sandor Yu <sandor.yu@nxp.com>");
|
|
MODULE_DESCRIPTION("Cadence HDMI transmitter driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:cdn-hdmi");
|