370 lines
7.2 KiB
C
370 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2019 NXP.
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*/
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#include <linux/clk.h>
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#include <linux/of_device.h>
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#include <linux/of_graph.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_qos.h>
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#include <linux/busfreq-imx.h>
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#include <drm/drm_modeset_helper.h>
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#include "dcss-dev.h"
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static void dcss_clocks_enable(struct dcss_dev *dcss)
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{
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if (dcss->clks_on)
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return;
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if (dcss->hdmi_output) {
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clk_prepare_enable(dcss->pll_phy_ref_clk);
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clk_prepare_enable(dcss->pll_src_clk);
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}
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clk_prepare_enable(dcss->axi_clk);
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clk_prepare_enable(dcss->apb_clk);
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clk_prepare_enable(dcss->rtrm_clk);
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clk_prepare_enable(dcss->dtrc_clk);
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clk_prepare_enable(dcss->pix_clk);
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dcss->clks_on = true;
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}
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static void dcss_clocks_disable(struct dcss_dev *dcss)
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{
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if (!dcss->clks_on)
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return;
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clk_disable_unprepare(dcss->pix_clk);
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clk_disable_unprepare(dcss->dtrc_clk);
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clk_disable_unprepare(dcss->rtrm_clk);
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clk_disable_unprepare(dcss->apb_clk);
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clk_disable_unprepare(dcss->axi_clk);
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if (dcss->hdmi_output) {
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clk_disable_unprepare(dcss->pll_src_clk);
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clk_disable_unprepare(dcss->pll_phy_ref_clk);
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}
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dcss->clks_on = false;
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}
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static void dcss_busfreq_enable(struct dcss_dev *dcss)
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{
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if (dcss->bus_freq_on)
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return;
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request_bus_freq(BUS_FREQ_HIGH);
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dcss->bus_freq_on = true;
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}
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static void dcss_busfreq_disable(struct dcss_dev *dcss)
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{
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if (!dcss->bus_freq_on)
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return;
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release_bus_freq(BUS_FREQ_HIGH);
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dcss->bus_freq_on = false;
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}
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static int dcss_submodules_init(struct dcss_dev *dcss)
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{
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int ret = 0;
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u32 base_addr = dcss->start_addr;
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const struct dcss_type_data *devtype = dcss->devtype;
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dcss_clocks_enable(dcss);
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ret = dcss_blkctl_init(dcss, base_addr + devtype->blkctl_ofs);
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if (ret)
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return ret;
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ret = dcss_ctxld_init(dcss, base_addr + devtype->ctxld_ofs);
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if (ret)
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goto ctxld_err;
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ret = dcss_dtg_init(dcss, base_addr + devtype->dtg_ofs);
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if (ret)
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goto dtg_err;
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ret = dcss_ss_init(dcss, base_addr + devtype->ss_ofs);
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if (ret)
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goto ss_err;
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ret = dcss_dtrc_init(dcss, base_addr + devtype->dtrc_ofs);
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if (ret)
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goto dtrc_err;
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ret = dcss_dpr_init(dcss, base_addr + devtype->dpr_ofs);
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if (ret)
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goto dpr_err;
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ret = dcss_wrscl_init(dcss, base_addr + devtype->wrscl_ofs);
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if (ret)
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goto wrscl_err;
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ret = dcss_rdsrc_init(dcss, base_addr + devtype->rdsrc_ofs);
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if (ret)
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goto rdsrc_err;
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ret = dcss_scaler_init(dcss, base_addr + devtype->scaler_ofs);
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if (ret)
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goto scaler_err;
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ret = dcss_dec400d_init(dcss, base_addr + devtype->dec400d_ofs);
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if (ret)
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goto dec400d_err;
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ret = dcss_hdr10_init(dcss, base_addr + devtype->hdr10_ofs);
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if (ret)
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goto hdr10_err;
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return 0;
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hdr10_err:
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dcss_dec400d_exit(dcss->dec400d);
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dec400d_err:
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dcss_scaler_exit(dcss->scaler);
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scaler_err:
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dcss_rdsrc_exit(dcss->rdsrc);
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rdsrc_err:
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dcss_wrscl_exit(dcss->wrscl);
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wrscl_err:
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dcss_dpr_exit(dcss->dpr);
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dpr_err:
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dcss_dtrc_exit(dcss->dtrc);
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dtrc_err:
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dcss_ss_exit(dcss->ss);
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ss_err:
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dcss_dtg_exit(dcss->dtg);
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dtg_err:
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dcss_ctxld_exit(dcss->ctxld);
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ctxld_err:
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dcss_blkctl_exit(dcss->blkctl);
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dcss_clocks_disable(dcss);
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return ret;
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}
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static void dcss_submodules_stop(struct dcss_dev *dcss)
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{
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dcss_clocks_enable(dcss);
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dcss_hdr10_exit(dcss->hdr10);
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dcss_dec400d_exit(dcss->dec400d);
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dcss_scaler_exit(dcss->scaler);
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dcss_rdsrc_exit(dcss->rdsrc);
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dcss_wrscl_exit(dcss->wrscl);
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dcss_dpr_exit(dcss->dpr);
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dcss_dtrc_exit(dcss->dtrc);
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dcss_ss_exit(dcss->ss);
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dcss_dtg_exit(dcss->dtg);
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dcss_ctxld_exit(dcss->ctxld);
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dcss_blkctl_exit(dcss->blkctl);
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dcss_clocks_disable(dcss);
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}
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static int dcss_clks_init(struct dcss_dev *dcss)
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{
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int i;
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struct {
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const char *id;
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struct clk **clk;
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bool required;
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} clks[] = {
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{"apb", &dcss->apb_clk, true},
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{"axi", &dcss->axi_clk, true},
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{"pix", &dcss->pix_clk, true},
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{"rtrm", &dcss->rtrm_clk, true},
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{"dtrc", &dcss->dtrc_clk, true},
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{"pll_src", &dcss->pll_src_clk, dcss->hdmi_output},
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{"pll_phy_ref", &dcss->pll_phy_ref_clk, dcss->hdmi_output},
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};
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for (i = 0; i < ARRAY_SIZE(clks); i++) {
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*clks[i].clk = devm_clk_get(dcss->dev, clks[i].id);
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if (IS_ERR(*clks[i].clk) && clks[i].required) {
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dev_err(dcss->dev, "failed to get %s clock\n",
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clks[i].id);
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return PTR_ERR(*clks[i].clk);
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}
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}
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dcss->clks_on = false;
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return 0;
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}
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static void dcss_clks_release(struct dcss_dev *dcss)
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{
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devm_clk_put(dcss->dev, dcss->dtrc_clk);
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devm_clk_put(dcss->dev, dcss->rtrm_clk);
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devm_clk_put(dcss->dev, dcss->pix_clk);
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devm_clk_put(dcss->dev, dcss->axi_clk);
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devm_clk_put(dcss->dev, dcss->apb_clk);
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}
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struct dcss_dev *dcss_dev_create(struct device *dev, bool hdmi_output)
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{
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struct platform_device *pdev = to_platform_device(dev);
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int ret;
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struct resource *res;
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struct dcss_dev *dcss;
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const struct dcss_type_data *devtype;
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devtype = of_device_get_match_data(dev);
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if (!devtype) {
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dev_err(dev, "no device match found\n");
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return ERR_PTR(-ENODEV);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "cannot get memory resource\n");
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return ERR_PTR(-EINVAL);
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}
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dcss = devm_kzalloc(dev, sizeof(struct dcss_dev), GFP_KERNEL);
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if (!dcss)
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return ERR_PTR(-ENOMEM);
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dcss->dev = dev;
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dcss->devtype = devtype;
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dcss->hdmi_output = hdmi_output;
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ret = dcss_clks_init(dcss);
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if (ret) {
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dev_err(dev, "clocks initialization failed\n");
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goto err;
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}
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dcss->of_port = of_graph_get_port_by_id(dev->of_node, 0);
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if (!dcss->of_port) {
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dev_err(dev, "no port@0 node in %s\n", dev->of_node->full_name);
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ret = -ENODEV;
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goto clks_err;
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}
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dcss->start_addr = res->start;
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ret = dcss_submodules_init(dcss);
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if (ret) {
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dev_err(dev, "submodules initialization failed\n");
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goto clks_err;
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}
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pm_runtime_enable(dev);
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return dcss;
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clks_err:
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dcss_clks_release(dcss);
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err:
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devm_kfree(dcss->dev, dcss);
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return ERR_PTR(ret);
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}
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void dcss_dev_destroy(struct dcss_dev *dcss)
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{
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pm_runtime_disable(dcss->dev);
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dcss_submodules_stop(dcss);
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dcss_clks_release(dcss);
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devm_kfree(dcss->dev, dcss);
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}
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#ifdef CONFIG_PM_SLEEP
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int dcss_dev_suspend(struct device *dev)
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{
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struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev);
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int ret;
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drm_mode_config_helper_suspend(dcss_drv_dev_to_drm(dev));
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if (pm_runtime_suspended(dev))
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return 0;
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ret = dcss_ctxld_suspend(dcss->ctxld);
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if (ret)
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return ret;
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dcss_clocks_disable(dcss);
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dcss_busfreq_disable(dcss);
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return 0;
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}
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int dcss_dev_resume(struct device *dev)
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{
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struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev);
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if (pm_runtime_suspended(dev)) {
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drm_mode_config_helper_resume(dcss_drv_dev_to_drm(dev));
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return 0;
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}
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dcss_busfreq_enable(dcss);
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dcss_clocks_enable(dcss);
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dcss_blkctl_cfg(dcss->blkctl);
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dcss_ctxld_resume(dcss->ctxld);
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drm_mode_config_helper_resume(dcss_drv_dev_to_drm(dev));
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return 0;
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}
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#endif /* CONFIG_PM_SLEEP */
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#ifdef CONFIG_PM
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int dcss_dev_runtime_suspend(struct device *dev)
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{
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struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev);
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int ret;
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ret = dcss_ctxld_suspend(dcss->ctxld);
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if (ret)
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return ret;
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dcss_clocks_disable(dcss);
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dcss_busfreq_disable(dcss);
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return 0;
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}
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int dcss_dev_runtime_resume(struct device *dev)
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{
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struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev);
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dcss_busfreq_enable(dcss);
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dcss_clocks_enable(dcss);
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dcss_blkctl_cfg(dcss->blkctl);
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dcss_ctxld_resume(dcss->ctxld);
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return 0;
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}
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#endif /* CONFIG_PM */
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