951ebf58bf
The ocram on imx6q is 256 KiB while on imx6dl it's 128 KiB. Let's have separate node for imx6q and imx6dl. It also changes imx6q size 0x3f000 to 0x40000 to match the hardware. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Liu Ying <Ying.Liu@freescale.com>
91 lines
1.6 KiB
Plaintext
91 lines
1.6 KiB
Plaintext
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include "imx6dl-pinfunc.h"
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#include "imx6qdl.dtsi"
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0>;
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next-level-cache = <&L2>;
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <1>;
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next-level-cache = <&L2>;
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};
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};
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soc {
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ocram: sram@00900000 {
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compatible = "mmio-sram";
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reg = <0x00900000 0x20000>;
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clocks = <&clks 142>;
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};
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aips1: aips-bus@02000000 {
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iomuxc: iomuxc@020e0000 {
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compatible = "fsl,imx6dl-iomuxc";
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};
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pxp: pxp@020f0000 {
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reg = <0x020f0000 0x4000>;
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interrupts = <0 98 0x04>;
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};
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epdc: epdc@020f4000 {
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reg = <0x020f4000 0x4000>;
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interrupts = <0 97 0x04>;
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};
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lcdif: lcdif@020f8000 {
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reg = <0x020f8000 0x4000>;
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interrupts = <0 39 0x04>;
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};
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};
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aips2: aips-bus@02100000 {
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i2c4: i2c@021f8000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx1-i2c";
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reg = <0x021f8000 0x4000>;
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interrupts = <0 35 0x04>;
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status = "disabled";
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};
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};
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};
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};
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&ldb {
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clocks = <&clks 33>, <&clks 34>,
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<&clks 39>, <&clks 40>,
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<&clks 135>, <&clks 136>;
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clock-names = "di0_pll", "di1_pll",
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"di0_sel", "di1_sel",
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"di0", "di1";
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lvds-channel@0 {
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crtcs = <&ipu1 0>, <&ipu1 1>;
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};
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lvds-channel@1 {
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crtcs = <&ipu1 0>, <&ipu1 1>;
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};
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};
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