7587b5965f
- Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSWIMoAAoJEBvUPslcq6VzudIQAKVjdFI26yxmI3xpYjNVS2P8 JWaUTTjHAR7Lc0EWwtuGj6CqCtbNXUH1bTnChQrkzhT7fPMGQGFbgErnoaYQdwwJ qI15T7qcwy4q54vzeaOMAUS9UNZzr4lChEvxt9uYNoEhHlu7i6/ntyk5fgRfHMsh yK439VA7W/2rLNinpUmIAghx6+gUuRIBbVtfJ71gg5roXL7fY2hYizEoIkDKqWSD i1F24Xt33LAjNhy3n4/6JxCldee7ib2z0YrOUOrTdXWh/L1G9tDTslkdga6rAA5c A+B4nP7zP7i9c1SlTPbwRyguwjHhfSPuNTRhyhuePbwVk4bscglQZx8A7dH8BwS0 pSCUxCTe2+CPEEzeN/ee9TgXwyX9Ab/r5BM092xFrX2lBbV3KxPl1F7rAxJ4HQTu Bh/M5bnKGupO7H9MOKqmLAf1y3a3JCrXVUuQljDMJnvauB8QFTx0nYQvZ/bQCJLZ /wfADHtooJ/FGHFS7Vb+HSLX7ifF2HyES9FgnQag5H77VfXS+bqI5yHsTcYHTgP1 MlW8mObg0vJ+oUuowhhrk9pzQ1l1VFIaMqOKOouL3X6GHAHFiBSCti1fRiSE7d4U feW7a0NSyIjue+MAwxCjSLXOpHCATgnQ1mp9s8ByD0IF98iPugpnp9d6NGH/wp9A bgK7SGeOWXGoc+kN672c =bqsS -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren: Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. * tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits) ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it ARM: OMAP2+: Add minimal 8250 support for GPMC ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap ARM: OMAP2+: Add support for auxdata pinctrl: single: Add support for auxdata pinctrl: single: Add support for wake-up interrupts pinctrl: single: Prepare for supporting SoC specific features ARM: OMAP2+: igep0020: use display init from dss-common ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
287 lines
6.4 KiB
Plaintext
287 lines
6.4 KiB
Plaintext
/include/ "skeleton.dtsi"
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#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
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/ {
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compatible = "marvell,kirkwood";
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interrupt-parent = <&intc>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "marvell,feroceon";
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reg = <0>;
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clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
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clock-names = "cpu_clk", "ddrclk", "powersave";
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};
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};
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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};
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mbus {
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compatible = "marvell,kirkwood-mbus", "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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/* If a board file needs to change this ranges it must replace it completely */
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */
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MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */
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MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */
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>;
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controller = <&mbusc>;
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pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
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pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
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crypto@0301 {
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compatible = "marvell,orion-crypto";
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reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>,
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<MBUS_ID(0x03, 0x01) 0 0x800>;
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reg-names = "regs", "sram";
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interrupts = <22>;
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clocks = <&gate_clk 17>;
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status = "okay";
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};
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nand: nand@012f {
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#address-cells = <1>;
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#size-cells = <1>;
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cle = <0>;
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ale = <1>;
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bank-width = <1>;
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compatible = "marvell,orion-nand";
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reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
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chip-delay = <25>;
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/* set partition map and/or chip-delay in board dts */
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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};
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ocp@f1000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xf1000000 0x0100000>;
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#address-cells = <1>;
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#size-cells = <1>;
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mbusc: mbus-controller@20000 {
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compatible = "marvell,mbus-controller";
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reg = <0x20000 0x80>, <0x1500 0x20>;
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};
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timer: timer@20300 {
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compatible = "marvell,orion-timer";
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reg = <0x20300 0x20>;
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interrupt-parent = <&bridge_intc>;
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interrupts = <1>, <2>;
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clocks = <&core_clk 0>;
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};
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intc: main-interrupt-ctrl@20200 {
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compatible = "marvell,orion-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x20200 0x10>, <0x20210 0x10>;
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};
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bridge_intc: bridge-interrupt-ctrl@20110 {
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compatible = "marvell,orion-bridge-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x20110 0x8>;
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interrupts = <1>;
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marvell,#interrupts = <6>;
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};
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core_clk: core-clocks@10030 {
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compatible = "marvell,kirkwood-core-clock";
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reg = <0x10030 0x4>;
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#clock-cells = <1>;
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};
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gpio0: gpio@10100 {
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compatible = "marvell,orion-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x10100 0x40>;
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ngpios = <32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <35>, <36>, <37>, <38>;
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clocks = <&gate_clk 7>;
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};
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gpio1: gpio@10140 {
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compatible = "marvell,orion-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x10140 0x40>;
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ngpios = <18>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <39>, <40>, <41>;
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clocks = <&gate_clk 7>;
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};
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serial@12000 {
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compatible = "ns16550a";
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reg = <0x12000 0x100>;
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reg-shift = <2>;
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interrupts = <33>;
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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serial@12100 {
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compatible = "ns16550a";
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reg = <0x12100 0x100>;
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reg-shift = <2>;
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interrupts = <34>;
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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spi@10600 {
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compatible = "marvell,orion-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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interrupts = <23>;
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reg = <0x10600 0x28>;
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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gate_clk: clock-gating-control@2011c {
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compatible = "marvell,kirkwood-gating-clock";
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reg = <0x2011c 0x4>;
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clocks = <&core_clk 0>;
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#clock-cells = <1>;
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};
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wdt: watchdog-timer@20300 {
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compatible = "marvell,orion-wdt";
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reg = <0x20300 0x28>;
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interrupt-parent = <&bridge_intc>;
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interrupts = <3>;
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clocks = <&gate_clk 7>;
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status = "okay";
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};
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xor@60800 {
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compatible = "marvell,orion-xor";
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reg = <0x60800 0x100
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0x60A00 0x100>;
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status = "okay";
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clocks = <&gate_clk 8>;
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xor00 {
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interrupts = <5>;
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dmacap,memcpy;
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dmacap,xor;
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};
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xor01 {
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interrupts = <6>;
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dmacap,memcpy;
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dmacap,xor;
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dmacap,memset;
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};
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};
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xor@60900 {
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compatible = "marvell,orion-xor";
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reg = <0x60900 0x100
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0x60B00 0x100>;
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status = "okay";
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clocks = <&gate_clk 16>;
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xor00 {
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interrupts = <7>;
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dmacap,memcpy;
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dmacap,xor;
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};
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xor01 {
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interrupts = <8>;
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dmacap,memcpy;
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dmacap,xor;
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dmacap,memset;
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};
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};
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ehci@50000 {
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compatible = "marvell,orion-ehci";
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reg = <0x50000 0x1000>;
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interrupts = <19>;
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clocks = <&gate_clk 3>;
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status = "okay";
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};
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i2c@11000 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0x11000 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <29>;
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clock-frequency = <100000>;
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clocks = <&gate_clk 7>;
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status = "disabled";
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};
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mdio: mdio-bus@72004 {
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compatible = "marvell,orion-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x72004 0x84>;
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interrupts = <46>;
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clocks = <&gate_clk 0>;
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status = "disabled";
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/* add phy nodes in board file */
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};
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eth0: ethernet-controller@72000 {
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compatible = "marvell,kirkwood-eth";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x72000 0x4000>;
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clocks = <&gate_clk 0>;
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marvell,tx-checksum-limit = <1600>;
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status = "disabled";
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ethernet0-port@0 {
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device_type = "network";
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compatible = "marvell,kirkwood-eth-port";
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reg = <0>;
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interrupts = <11>;
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/* overwrite MAC address in bootloader */
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local-mac-address = [00 00 00 00 00 00];
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/* set phy-handle property in board file */
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};
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};
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eth1: ethernet-controller@76000 {
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compatible = "marvell,kirkwood-eth";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x76000 0x4000>;
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clocks = <&gate_clk 19>;
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marvell,tx-checksum-limit = <1600>;
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status = "disabled";
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ethernet1-port@0 {
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device_type = "network";
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compatible = "marvell,kirkwood-eth-port";
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reg = <0>;
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interrupts = <15>;
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/* overwrite MAC address in bootloader */
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local-mac-address = [00 00 00 00 00 00];
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/* set phy-handle property in board file */
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};
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};
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};
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};
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