237bcad102
Enable the first PCIe root port which is connected to an FPGA on the Tamonten Evaluation Carrier and add device nodes for each of the PCI endpoints available in the standard configuration. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
71 lines
1.4 KiB
Plaintext
71 lines
1.4 KiB
Plaintext
/dts-v1/;
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#include "tegra20-tamonten.dtsi"
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/ {
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model = "Avionic Design Tamonten Evaluation Carrier";
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compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
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host1x {
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hdmi {
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status = "okay";
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};
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};
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i2c@7000c000 {
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = <0xffffffff
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0xffffffff
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0
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0xffffffff
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0xffffffff>;
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};
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};
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pcie-controller {
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status = "okay";
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pci@1,0 {
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status = "okay";
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};
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};
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sound {
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compatible = "ad,tegra-audio-wm8903-tec",
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"nvidia,tegra-audio-wm8903";
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nvidia,model = "Avionic Design TEC";
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nvidia,audio-routing =
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"Headphone Jack", "HPOUTR",
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"Headphone Jack", "HPOUTL",
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"Int Spk", "ROP",
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"Int Spk", "RON",
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"Int Spk", "LOP",
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"Int Spk", "LON",
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"Mic Jack", "MICBIAS",
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"IN1L", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&wm8903>;
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nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
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nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
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GPIO_ACTIVE_HIGH>;
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clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
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<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
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<&tegra_car TEGRA20_CLK_CDEV1>;
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clock-names = "pll_a", "pll_a_out0", "mclk";
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};
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};
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