![Greg Kroah-Hartman](/assets/img/avatar_default.png)
We currently keep 2 lists of PCI devices in the system, one in the driver core, and one all on its own. This second list is sorted at boot time, in "BIOS" order, to try to remain compatible with older kernels (2.2 and earlier days). There was also a "nosort" option to turn this sorting off, to remain compatible with even older kernel versions, but that just ends up being what we have been doing from 2.5 days... Unfortunately, the second list of devices is not really ever used to determine the probing order of PCI devices or drivers[1]. That is done using the driver core list instead. This change happened back in the early 2.5 days. Relying on BIOS ording for the binding of drivers to specific device names is problematic for many reasons, and userspace tools like udev exist to properly name devices in a persistant manner if that is needed, no reliance on the BIOS is needed. Matt Domsch and others at Dell noticed this back in 2006, and added a boot option to sort the PCI device lists (both of them) in a breadth-first manner to help remain compatible with the 2.4 order, if needed for any reason. This option is not going away, as some systems rely on them. This patch removes the sorting of the internal PCI device list in "BIOS" mode, as it's not needed at all anymore, and hasn't for many years. I've also removed the PCI flags for this from some other arches that for some reason defined them, but never used them. This should not change the ordering of any drivers or device probing. [1] The old-style pci_get_device and pci_find_device() still used this sorting order, but there are very few drivers that use these functions, as they are deprecated for use in this manner. If for some reason, a driver rely on the order and uses these functions, the breadth-first boot option will resolve any problem. Cc: Matt Domsch <Matt_Domsch@dell.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
431 lines
10 KiB
C
431 lines
10 KiB
C
/*
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* BIOS32 and PCI BIOS handling.
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/uaccess.h>
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#include "pci.h"
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#include "pci-functions.h"
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/* BIOS32 signature: "_32_" */
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#define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
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/* PCI signature: "PCI " */
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#define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
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/* PCI service signature: "$PCI" */
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#define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
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/* PCI BIOS hardware mechanism flags */
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#define PCIBIOS_HW_TYPE1 0x01
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#define PCIBIOS_HW_TYPE2 0x02
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#define PCIBIOS_HW_TYPE1_SPEC 0x10
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#define PCIBIOS_HW_TYPE2_SPEC 0x20
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/*
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* This is the standard structure used to identify the entry point
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* to the BIOS32 Service Directory, as documented in
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* Standard BIOS 32-bit Service Directory Proposal
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* Revision 0.4 May 24, 1993
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* Phoenix Technologies Ltd.
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* Norwood, MA
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* and the PCI BIOS specification.
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*/
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union bios32 {
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struct {
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unsigned long signature; /* _32_ */
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unsigned long entry; /* 32 bit physical address */
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unsigned char revision; /* Revision level, 0 */
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unsigned char length; /* Length in paragraphs should be 01 */
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unsigned char checksum; /* All bytes must add up to zero */
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unsigned char reserved[5]; /* Must be zero */
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} fields;
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char chars[16];
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};
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/*
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* Physical address of the service directory. I don't know if we're
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* allowed to have more than one of these or not, so just in case
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* we'll make pcibios_present() take a memory start parameter and store
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* the array there.
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*/
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static struct {
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unsigned long address;
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unsigned short segment;
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} bios32_indirect = { 0, __KERNEL_CS };
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/*
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* Returns the entry point for the given service, NULL on error
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*/
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static unsigned long bios32_service(unsigned long service)
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{
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unsigned char return_code; /* %al */
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unsigned long address; /* %ebx */
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unsigned long length; /* %ecx */
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unsigned long entry; /* %edx */
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unsigned long flags;
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local_irq_save(flags);
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__asm__("lcall *(%%edi); cld"
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: "=a" (return_code),
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"=b" (address),
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"=c" (length),
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"=d" (entry)
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: "0" (service),
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"1" (0),
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"D" (&bios32_indirect));
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local_irq_restore(flags);
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switch (return_code) {
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case 0:
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return address + entry;
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case 0x80: /* Not present */
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printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
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return 0;
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default: /* Shouldn't happen */
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printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
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service, return_code);
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return 0;
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}
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}
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static struct {
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unsigned long address;
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unsigned short segment;
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} pci_indirect = { 0, __KERNEL_CS };
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static int pci_bios_present;
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static int __devinit check_pcibios(void)
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{
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u32 signature, eax, ebx, ecx;
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u8 status, major_ver, minor_ver, hw_mech;
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unsigned long flags, pcibios_entry;
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if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
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pci_indirect.address = pcibios_entry + PAGE_OFFSET;
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local_irq_save(flags);
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__asm__(
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"lcall *(%%edi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=d" (signature),
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"=a" (eax),
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"=b" (ebx),
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"=c" (ecx)
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: "1" (PCIBIOS_PCI_BIOS_PRESENT),
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"D" (&pci_indirect)
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: "memory");
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local_irq_restore(flags);
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status = (eax >> 8) & 0xff;
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hw_mech = eax & 0xff;
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major_ver = (ebx >> 8) & 0xff;
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minor_ver = ebx & 0xff;
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if (pcibios_last_bus < 0)
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pcibios_last_bus = ecx & 0xff;
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DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
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status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
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if (status || signature != PCI_SIGNATURE) {
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printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
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status, signature);
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return 0;
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}
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printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
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major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
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#ifdef CONFIG_PCI_DIRECT
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if (!(hw_mech & PCIBIOS_HW_TYPE1))
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pci_probe &= ~PCI_PROBE_CONF1;
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if (!(hw_mech & PCIBIOS_HW_TYPE2))
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pci_probe &= ~PCI_PROBE_CONF2;
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#endif
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return 1;
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}
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return 0;
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}
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static int pci_bios_read(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *value)
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{
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unsigned long result = 0;
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unsigned long flags;
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unsigned long bx = (bus << 8) | devfn;
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if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
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return -EINVAL;
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spin_lock_irqsave(&pci_config_lock, flags);
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switch (len) {
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case 1:
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=c" (*value),
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"=a" (result)
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: "1" (PCIBIOS_READ_CONFIG_BYTE),
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"b" (bx),
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"D" ((long)reg),
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"S" (&pci_indirect));
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/*
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* Zero-extend the result beyond 8 bits, do not trust the
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* BIOS having done it:
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*/
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*value &= 0xff;
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break;
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case 2:
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=c" (*value),
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"=a" (result)
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: "1" (PCIBIOS_READ_CONFIG_WORD),
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"b" (bx),
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"D" ((long)reg),
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"S" (&pci_indirect));
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/*
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* Zero-extend the result beyond 16 bits, do not trust the
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* BIOS having done it:
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*/
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*value &= 0xffff;
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break;
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case 4:
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=c" (*value),
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"=a" (result)
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: "1" (PCIBIOS_READ_CONFIG_DWORD),
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"b" (bx),
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"D" ((long)reg),
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"S" (&pci_indirect));
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break;
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}
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spin_unlock_irqrestore(&pci_config_lock, flags);
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return (int)((result & 0xff00) >> 8);
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}
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static int pci_bios_write(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 value)
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{
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unsigned long result = 0;
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unsigned long flags;
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unsigned long bx = (bus << 8) | devfn;
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if ((bus > 255) || (devfn > 255) || (reg > 255))
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return -EINVAL;
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spin_lock_irqsave(&pci_config_lock, flags);
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switch (len) {
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case 1:
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (result)
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: "0" (PCIBIOS_WRITE_CONFIG_BYTE),
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"c" (value),
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"b" (bx),
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"D" ((long)reg),
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"S" (&pci_indirect));
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break;
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case 2:
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (result)
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: "0" (PCIBIOS_WRITE_CONFIG_WORD),
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"c" (value),
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"b" (bx),
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"D" ((long)reg),
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"S" (&pci_indirect));
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break;
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case 4:
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (result)
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: "0" (PCIBIOS_WRITE_CONFIG_DWORD),
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"c" (value),
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"b" (bx),
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"D" ((long)reg),
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"S" (&pci_indirect));
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break;
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}
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spin_unlock_irqrestore(&pci_config_lock, flags);
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return (int)((result & 0xff00) >> 8);
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}
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/*
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* Function table for BIOS32 access
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*/
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static struct pci_raw_ops pci_bios_access = {
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.read = pci_bios_read,
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.write = pci_bios_write
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};
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/*
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* Try to find PCI BIOS.
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*/
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static struct pci_raw_ops * __devinit pci_find_bios(void)
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{
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union bios32 *check;
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unsigned char sum;
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int i, length;
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/*
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* Follow the standard procedure for locating the BIOS32 Service
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* directory by scanning the permissible address range from
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* 0xe0000 through 0xfffff for a valid BIOS32 structure.
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*/
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for (check = (union bios32 *) __va(0xe0000);
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check <= (union bios32 *) __va(0xffff0);
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++check) {
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long sig;
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if (probe_kernel_address(&check->fields.signature, sig))
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continue;
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if (check->fields.signature != BIOS32_SIGNATURE)
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continue;
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length = check->fields.length * 16;
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if (!length)
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continue;
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sum = 0;
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for (i = 0; i < length ; ++i)
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sum += check->chars[i];
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if (sum != 0)
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continue;
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if (check->fields.revision != 0) {
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printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
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check->fields.revision, check);
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continue;
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}
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DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
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if (check->fields.entry >= 0x100000) {
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printk("PCI: BIOS32 entry (0x%p) in high memory, "
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"cannot use.\n", check);
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return NULL;
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} else {
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unsigned long bios32_entry = check->fields.entry;
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DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
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bios32_entry);
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bios32_indirect.address = bios32_entry + PAGE_OFFSET;
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if (check_pcibios())
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return &pci_bios_access;
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}
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break; /* Hopefully more than one BIOS32 cannot happen... */
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}
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return NULL;
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}
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/*
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* BIOS Functions for IRQ Routing
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*/
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struct irq_routing_options {
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u16 size;
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struct irq_info *table;
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u16 segment;
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} __attribute__((packed));
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struct irq_routing_table * pcibios_get_irq_routing_table(void)
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{
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struct irq_routing_options opt;
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struct irq_routing_table *rt = NULL;
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int ret, map;
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unsigned long page;
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if (!pci_bios_present)
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return NULL;
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page = __get_free_page(GFP_KERNEL);
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if (!page)
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return NULL;
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opt.table = (struct irq_info *) page;
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opt.size = PAGE_SIZE;
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opt.segment = __KERNEL_DS;
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DBG("PCI: Fetching IRQ routing table... ");
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__asm__("push %%es\n\t"
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"push %%ds\n\t"
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"pop %%es\n\t"
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"lcall *(%%esi); cld\n\t"
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"pop %%es\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (ret),
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"=b" (map),
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"=m" (opt)
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: "0" (PCIBIOS_GET_ROUTING_OPTIONS),
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"1" (0),
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"D" ((long) &opt),
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"S" (&pci_indirect),
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"m" (opt)
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: "memory");
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DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map);
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if (ret & 0xff00)
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printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
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else if (opt.size) {
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rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
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if (rt) {
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memset(rt, 0, sizeof(struct irq_routing_table));
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rt->size = opt.size + sizeof(struct irq_routing_table);
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rt->exclusive_irqs = map;
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memcpy(rt->slots, (void *) page, opt.size);
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printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
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}
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}
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free_page(page);
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return rt;
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}
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EXPORT_SYMBOL(pcibios_get_irq_routing_table);
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int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
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{
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int ret;
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__asm__("lcall *(%%esi); cld\n\t"
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (ret)
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: "0" (PCIBIOS_SET_PCI_HW_INT),
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"b" ((dev->bus->number << 8) | dev->devfn),
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"c" ((irq << 8) | (pin + 10)),
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"S" (&pci_indirect));
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return !(ret & 0xff00);
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}
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EXPORT_SYMBOL(pcibios_set_irq_routing);
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void __init pci_pcbios_init(void)
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{
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if ((pci_probe & PCI_PROBE_BIOS)
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&& ((raw_pci_ops = pci_find_bios()))) {
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pci_bios_present = 1;
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}
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}
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