![Arnd Bergmann](/assets/img/avatar_default.png)
gcc warns about the use of regulators in phy_8x16_probe: drivers/usb/phy/phy-qcom-8x16-usb.c: In function 'phy_8x16_probe': drivers/usb/phy/phy-qcom-8x16-usb.c:284:13: error: 'regs[0].consumer' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/usb/phy/phy-qcom-8x16-usb.c:285:13: error: 'regs[1].consumer' may be used uninitialized in this function [-Werror=maybe-uninitialized] drivers/usb/phy/phy-qcom-8x16-usb.c:286:12: error: 'regs[2].consumer' may be used uninitialized in this function [-Werror=maybe-uninitialized] According to Mark Brown, this is the result of various abuses of the PHY interfaces [1], so let's fix the driver instead. This puts the regulator bulk data into the device structure so it gets properly initialized and lets us call regulator_bulk_enable() and regulator_bulk_disable() rather than open-coding them. Setting the voltages the way the driver does is rather pointless because for each regulator there is only one valid voltage range, so that can just get set up in the DT. As there doesn't seem to be any user of the newly added driver yet, we can simply make sure the DTs are setting this up right when they get added. I'm also fixing the handling of regulator_bulk_enable() failure. Right now, the driver just ignores any failure, which doesn't make sense, so I'm changing it to loudly complain (in case we actually had a bug here) and error out. Doing a fly-by review of the driver, I notice a couple of other problems that I'm not addressing here: - It really should not have been written as a USB PHY driver, but instead should use the PHY subsystem. - The DT compatible string does not follow the usual conventions, and it should have a proper identifier in it rather than a wildcard. - The example in the devicetree binding lists a register address that is the same as the actual EHCI host controller in the SoC as well as the otg-snps and the ci-hdrc device, which indicates that these are probably not even distinct devices (or all but one of them are wrong), and if more than one of them tries to request the resources correctly, they fail. [1] https://lkml.org/lkml/2016/1/26/267 Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
388 lines
9.7 KiB
C
388 lines
9.7 KiB
C
/*
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* Copyright (c) 2015, Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/extcon.h>
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#include <linux/gpio/consumer.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/slab.h>
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#include <linux/usb.h>
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#include <linux/usb/ulpi.h>
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#define HSPHY_AHBBURST 0x0090
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#define HSPHY_AHBMODE 0x0098
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#define HSPHY_GENCONFIG 0x009c
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#define HSPHY_GENCONFIG_2 0x00a0
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#define HSPHY_USBCMD 0x0140
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#define HSPHY_ULPI_VIEWPORT 0x0170
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#define HSPHY_CTRL 0x0240
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#define HSPHY_TXFIFO_IDLE_FORCE_DIS BIT(4)
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#define HSPHY_SESS_VLD_CTRL_EN BIT(7)
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#define HSPHY_POR_ASSERT BIT(0)
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#define HSPHY_RETEN BIT(1)
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#define HSPHY_SESS_VLD_CTRL BIT(25)
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#define ULPI_PWR_CLK_MNG_REG 0x88
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#define ULPI_PWR_OTG_COMP_DISABLE BIT(0)
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#define ULPI_MISC_A 0x96
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#define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
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#define ULPI_MISC_A_VBUSVLDEXT BIT(0)
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#define HSPHY_3P3_MIN 3050000 /* uV */
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#define HSPHY_3P3_MAX 3300000 /* uV */
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#define HSPHY_1P8_MIN 1800000 /* uV */
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#define HSPHY_1P8_MAX 1800000 /* uV */
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#define HSPHY_VDD_MIN 5
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#define HSPHY_VDD_MAX 7
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struct phy_8x16 {
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struct usb_phy phy;
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void __iomem *regs;
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struct clk *core_clk;
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struct clk *iface_clk;
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struct regulator_bulk_data regulator[3];
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struct reset_control *phy_reset;
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struct extcon_dev *vbus_edev;
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struct notifier_block vbus_notify;
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struct gpio_desc *switch_gpio;
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struct notifier_block reboot_notify;
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};
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static int phy_8x16_notify_connect(struct usb_phy *phy,
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enum usb_device_speed speed)
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{
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struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
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u32 val;
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val = ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT;
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usb_phy_io_write(&qphy->phy, val, ULPI_SET(ULPI_MISC_A));
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val = readl(qphy->regs + HSPHY_USBCMD);
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val |= HSPHY_SESS_VLD_CTRL;
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writel(val, qphy->regs + HSPHY_USBCMD);
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return 0;
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}
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static int phy_8x16_notify_disconnect(struct usb_phy *phy,
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enum usb_device_speed speed)
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{
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struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
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u32 val;
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val = ULPI_MISC_A_VBUSVLDEXT | ULPI_MISC_A_VBUSVLDEXTSEL;
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usb_phy_io_write(&qphy->phy, val, ULPI_CLR(ULPI_MISC_A));
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val = readl(qphy->regs + HSPHY_USBCMD);
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val &= ~HSPHY_SESS_VLD_CTRL;
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writel(val, qphy->regs + HSPHY_USBCMD);
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return 0;
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}
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static int phy_8x16_vbus_on(struct phy_8x16 *qphy)
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{
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phy_8x16_notify_connect(&qphy->phy, USB_SPEED_UNKNOWN);
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/* Switch D+/D- lines to Device connector */
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gpiod_set_value_cansleep(qphy->switch_gpio, 0);
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return 0;
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}
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static int phy_8x16_vbus_off(struct phy_8x16 *qphy)
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{
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phy_8x16_notify_disconnect(&qphy->phy, USB_SPEED_UNKNOWN);
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/* Switch D+/D- lines to USB HUB */
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gpiod_set_value_cansleep(qphy->switch_gpio, 1);
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return 0;
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}
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static int phy_8x16_vbus_notify(struct notifier_block *nb, unsigned long event,
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void *ptr)
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{
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struct phy_8x16 *qphy = container_of(nb, struct phy_8x16, vbus_notify);
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if (event)
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phy_8x16_vbus_on(qphy);
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else
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phy_8x16_vbus_off(qphy);
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return NOTIFY_DONE;
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}
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static int phy_8x16_init(struct usb_phy *phy)
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{
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struct phy_8x16 *qphy = container_of(phy, struct phy_8x16, phy);
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u32 val, init[] = {0x44, 0x6B, 0x24, 0x13};
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u32 addr = ULPI_EXT_VENDOR_SPECIFIC;
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int idx, state;
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for (idx = 0; idx < ARRAY_SIZE(init); idx++)
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usb_phy_io_write(phy, init[idx], addr + idx);
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reset_control_reset(qphy->phy_reset);
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/* Assert USB HSPHY_POR */
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val = readl(qphy->regs + HSPHY_CTRL);
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val |= HSPHY_POR_ASSERT;
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writel(val, qphy->regs + HSPHY_CTRL);
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/*
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* wait for minimum 10 microseconds as suggested in HPG.
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* Use a slightly larger value since the exact value didn't
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* work 100% of the time.
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*/
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usleep_range(12, 15);
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/* Deassert USB HSPHY_POR */
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val = readl(qphy->regs + HSPHY_CTRL);
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val &= ~HSPHY_POR_ASSERT;
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writel(val, qphy->regs + HSPHY_CTRL);
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usleep_range(10, 15);
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writel(0x00, qphy->regs + HSPHY_AHBBURST);
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writel(0x08, qphy->regs + HSPHY_AHBMODE);
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/* workaround for rx buffer collision issue */
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val = readl(qphy->regs + HSPHY_GENCONFIG);
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val &= ~HSPHY_TXFIFO_IDLE_FORCE_DIS;
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writel(val, qphy->regs + HSPHY_GENCONFIG);
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val = readl(qphy->regs + HSPHY_GENCONFIG_2);
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val |= HSPHY_SESS_VLD_CTRL_EN;
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writel(val, qphy->regs + HSPHY_GENCONFIG_2);
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val = ULPI_PWR_OTG_COMP_DISABLE;
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usb_phy_io_write(phy, val, ULPI_SET(ULPI_PWR_CLK_MNG_REG));
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state = extcon_get_cable_state_(qphy->vbus_edev, EXTCON_USB);
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if (state)
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phy_8x16_vbus_on(qphy);
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else
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phy_8x16_vbus_off(qphy);
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val = usb_phy_io_read(&qphy->phy, ULPI_FUNC_CTRL);
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val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
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val |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
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usb_phy_io_write(&qphy->phy, val, ULPI_FUNC_CTRL);
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return 0;
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}
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static void phy_8x16_shutdown(struct usb_phy *phy)
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{
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u32 val;
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/* Put the controller in non-driving mode */
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val = usb_phy_io_read(phy, ULPI_FUNC_CTRL);
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val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
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val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
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usb_phy_io_write(phy, val, ULPI_FUNC_CTRL);
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}
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static int phy_8x16_read_devicetree(struct phy_8x16 *qphy)
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{
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struct device *dev = qphy->phy.dev;
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int ret;
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qphy->core_clk = devm_clk_get(dev, "core");
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if (IS_ERR(qphy->core_clk))
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return PTR_ERR(qphy->core_clk);
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qphy->iface_clk = devm_clk_get(dev, "iface");
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if (IS_ERR(qphy->iface_clk))
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return PTR_ERR(qphy->iface_clk);
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qphy->regulator[0].supply = "v3p3";
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qphy->regulator[1].supply = "v1p8";
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qphy->regulator[2].supply = "vddcx";
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ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(qphy->regulator),
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qphy->regulator);
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if (ret)
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return ret;
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qphy->phy_reset = devm_reset_control_get(dev, "phy");
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if (IS_ERR(qphy->phy_reset))
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return PTR_ERR(qphy->phy_reset);
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qphy->switch_gpio = devm_gpiod_get_optional(dev, "switch",
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GPIOD_OUT_LOW);
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if (IS_ERR(qphy->switch_gpio))
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return PTR_ERR(qphy->switch_gpio);
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return 0;
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}
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static int phy_8x16_reboot_notify(struct notifier_block *this,
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unsigned long code, void *unused)
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{
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struct phy_8x16 *qphy;
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qphy = container_of(this, struct phy_8x16, reboot_notify);
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/*
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* Ensure that D+/D- lines are routed to uB connector, so
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* we could load bootloader/kernel at next reboot_notify
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*/
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gpiod_set_value_cansleep(qphy->switch_gpio, 0);
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return NOTIFY_DONE;
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}
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static int phy_8x16_probe(struct platform_device *pdev)
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{
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struct phy_8x16 *qphy;
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struct resource *res;
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struct usb_phy *phy;
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int ret;
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qphy = devm_kzalloc(&pdev->dev, sizeof(*qphy), GFP_KERNEL);
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if (!qphy)
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return -ENOMEM;
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platform_set_drvdata(pdev, qphy);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -EINVAL;
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qphy->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!qphy->regs)
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return -ENOMEM;
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phy = &qphy->phy;
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phy->dev = &pdev->dev;
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phy->label = dev_name(&pdev->dev);
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phy->init = phy_8x16_init;
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phy->shutdown = phy_8x16_shutdown;
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phy->notify_connect = phy_8x16_notify_connect;
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phy->notify_disconnect = phy_8x16_notify_disconnect;
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phy->io_priv = qphy->regs + HSPHY_ULPI_VIEWPORT;
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phy->io_ops = &ulpi_viewport_access_ops;
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phy->type = USB_PHY_TYPE_USB2;
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ret = phy_8x16_read_devicetree(qphy);
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if (ret < 0)
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return ret;
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qphy->vbus_edev = extcon_get_edev_by_phandle(phy->dev, 0);
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if (IS_ERR(qphy->vbus_edev))
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return PTR_ERR(qphy->vbus_edev);
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ret = clk_set_rate(qphy->core_clk, INT_MAX);
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if (ret < 0)
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dev_dbg(phy->dev, "Can't boost core clock\n");
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ret = clk_prepare_enable(qphy->core_clk);
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if (ret < 0)
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return ret;
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ret = clk_prepare_enable(qphy->iface_clk);
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if (ret < 0)
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goto off_core;
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ret = regulator_bulk_enable(ARRAY_SIZE(qphy->regulator),
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qphy->regulator);
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if (WARN_ON(ret))
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goto off_clks;
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qphy->vbus_notify.notifier_call = phy_8x16_vbus_notify;
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ret = extcon_register_notifier(qphy->vbus_edev, EXTCON_USB,
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&qphy->vbus_notify);
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if (ret < 0)
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goto off_power;
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ret = usb_add_phy_dev(&qphy->phy);
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if (ret)
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goto off_extcon;
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qphy->reboot_notify.notifier_call = phy_8x16_reboot_notify;
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register_reboot_notifier(&qphy->reboot_notify);
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return 0;
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off_extcon:
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extcon_unregister_notifier(qphy->vbus_edev, EXTCON_USB,
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&qphy->vbus_notify);
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off_power:
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regulator_bulk_disable(ARRAY_SIZE(qphy->regulator), qphy->regulator);
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off_clks:
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clk_disable_unprepare(qphy->iface_clk);
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off_core:
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clk_disable_unprepare(qphy->core_clk);
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return ret;
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}
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static int phy_8x16_remove(struct platform_device *pdev)
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{
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struct phy_8x16 *qphy = platform_get_drvdata(pdev);
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unregister_reboot_notifier(&qphy->reboot_notify);
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extcon_unregister_notifier(qphy->vbus_edev, EXTCON_USB,
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&qphy->vbus_notify);
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/*
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* Ensure that D+/D- lines are routed to uB connector, so
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* we could load bootloader/kernel at next reboot_notify
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*/
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gpiod_set_value_cansleep(qphy->switch_gpio, 0);
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usb_remove_phy(&qphy->phy);
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clk_disable_unprepare(qphy->iface_clk);
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clk_disable_unprepare(qphy->core_clk);
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regulator_bulk_disable(ARRAY_SIZE(qphy->regulator), qphy->regulator);
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return 0;
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}
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static const struct of_device_id phy_8x16_dt_match[] = {
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{ .compatible = "qcom,usb-8x16-phy" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, phy_8x16_dt_match);
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static struct platform_driver phy_8x16_driver = {
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.probe = phy_8x16_probe,
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.remove = phy_8x16_remove,
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.driver = {
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.name = "phy-qcom-8x16-usb",
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.of_match_table = phy_8x16_dt_match,
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},
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};
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module_platform_driver(phy_8x16_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Qualcomm APQ8016/MSM8916 chipsets USB transceiver driver");
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