![Quentin Schulz](/assets/img/avatar_default.png)
!!'s behaviour isn't that obvious and sparse complained about it, so let's replace it with a ternary condition. Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
762 lines
19 KiB
C
762 lines
19 KiB
C
/* ADC driver for AXP20X and AXP22X PMICs
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*
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* Copyright (c) 2016 Free Electrons NextThing Co.
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* Quentin Schulz <quentin.schulz@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/thermal.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/driver.h>
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#include <linux/iio/machine.h>
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#include <linux/mfd/axp20x.h>
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#define AXP20X_ADC_EN1_MASK GENMASK(7, 0)
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#define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7))
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#define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0))
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#define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0)
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#define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1)
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#define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0))
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#define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1)
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#define AXP20X_ADC_RATE_MASK GENMASK(7, 6)
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#define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4)
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#define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK)
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#define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK)
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#define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK)
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#define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x)
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#define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
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#define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
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#define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \
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{ \
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.type = _type, \
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.indexed = 1, \
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.channel = _channel, \
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.address = _reg, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.datasheet_name = _name, \
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}
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#define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \
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{ \
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.type = _type, \
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.indexed = 1, \
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.channel = _channel, \
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.address = _reg, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE) |\
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BIT(IIO_CHAN_INFO_OFFSET),\
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.datasheet_name = _name, \
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}
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struct axp_data;
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struct axp20x_adc_iio {
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struct regmap *regmap;
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struct axp_data *data;
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};
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enum axp20x_adc_channel_v {
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AXP20X_ACIN_V = 0,
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AXP20X_VBUS_V,
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AXP20X_TS_IN,
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AXP20X_GPIO0_V,
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AXP20X_GPIO1_V,
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AXP20X_IPSOUT_V,
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AXP20X_BATT_V,
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};
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enum axp20x_adc_channel_i {
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AXP20X_ACIN_I = 0,
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AXP20X_VBUS_I,
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AXP20X_BATT_CHRG_I,
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AXP20X_BATT_DISCHRG_I,
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};
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enum axp22x_adc_channel_v {
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AXP22X_TS_IN = 0,
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AXP22X_BATT_V,
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};
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enum axp22x_adc_channel_i {
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AXP22X_BATT_CHRG_I = 1,
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AXP22X_BATT_DISCHRG_I,
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};
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enum axp813_adc_channel_v {
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AXP813_TS_IN = 0,
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AXP813_GPIO0_V,
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AXP813_BATT_V,
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};
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static struct iio_map axp20x_maps[] = {
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{
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.consumer_dev_name = "axp20x-usb-power-supply",
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.consumer_channel = "vbus_v",
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.adc_channel_label = "vbus_v",
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}, {
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.consumer_dev_name = "axp20x-usb-power-supply",
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.consumer_channel = "vbus_i",
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.adc_channel_label = "vbus_i",
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}, {
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.consumer_dev_name = "axp20x-ac-power-supply",
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.consumer_channel = "acin_v",
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.adc_channel_label = "acin_v",
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}, {
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.consumer_dev_name = "axp20x-ac-power-supply",
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.consumer_channel = "acin_i",
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.adc_channel_label = "acin_i",
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}, {
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.consumer_dev_name = "axp20x-battery-power-supply",
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.consumer_channel = "batt_v",
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.adc_channel_label = "batt_v",
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}, {
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.consumer_dev_name = "axp20x-battery-power-supply",
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.consumer_channel = "batt_chrg_i",
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.adc_channel_label = "batt_chrg_i",
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}, {
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.consumer_dev_name = "axp20x-battery-power-supply",
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.consumer_channel = "batt_dischrg_i",
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.adc_channel_label = "batt_dischrg_i",
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}, { /* sentinel */ }
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};
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static struct iio_map axp22x_maps[] = {
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{
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.consumer_dev_name = "axp20x-battery-power-supply",
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.consumer_channel = "batt_v",
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.adc_channel_label = "batt_v",
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}, {
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.consumer_dev_name = "axp20x-battery-power-supply",
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.consumer_channel = "batt_chrg_i",
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.adc_channel_label = "batt_chrg_i",
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}, {
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.consumer_dev_name = "axp20x-battery-power-supply",
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.consumer_channel = "batt_dischrg_i",
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.adc_channel_label = "batt_dischrg_i",
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}, { /* sentinel */ }
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};
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/*
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* Channels are mapped by physical system. Their channels share the same index.
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* i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw.
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* The only exception is for the battery. batt_v will be in_voltage6_raw and
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* charge current in_current6_raw and discharge current will be in_current7_raw.
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*/
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static const struct iio_chan_spec axp20x_adc_channels[] = {
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AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
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AXP20X_ACIN_V_ADC_H),
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AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT,
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AXP20X_ACIN_I_ADC_H),
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AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE,
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AXP20X_VBUS_V_ADC_H),
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AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT,
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AXP20X_VBUS_I_ADC_H),
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{
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.type = IIO_TEMP,
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.address = AXP20X_TEMP_ADC_H,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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.datasheet_name = "pmic_temp",
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},
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AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
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AXP20X_GPIO0_V_ADC_H),
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AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
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AXP20X_GPIO1_V_ADC_H),
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AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
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AXP20X_IPSOUT_V_HIGH_H),
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AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE,
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AXP20X_BATT_V_H),
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AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
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AXP20X_BATT_CHRG_I_H),
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AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
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AXP20X_BATT_DISCHRG_I_H),
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};
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static const struct iio_chan_spec axp22x_adc_channels[] = {
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{
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.type = IIO_TEMP,
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.address = AXP22X_PMIC_TEMP_H,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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.datasheet_name = "pmic_temp",
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},
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AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE,
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AXP20X_BATT_V_H),
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AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
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AXP20X_BATT_CHRG_I_H),
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AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
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AXP20X_BATT_DISCHRG_I_H),
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};
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static const struct iio_chan_spec axp813_adc_channels[] = {
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{
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.type = IIO_TEMP,
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.address = AXP22X_PMIC_TEMP_H,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OFFSET),
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.datasheet_name = "pmic_temp",
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},
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AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
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AXP288_GP_ADC_H),
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AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE,
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AXP20X_BATT_V_H),
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AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
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AXP20X_BATT_CHRG_I_H),
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AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
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AXP20X_BATT_DISCHRG_I_H),
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};
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static int axp20x_adc_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val)
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{
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struct axp20x_adc_iio *info = iio_priv(indio_dev);
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int size = 12;
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/*
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* N.B.: Unlike the Chinese datasheets tell, the charging current is
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* stored on 12 bits, not 13 bits. Only discharging current is on 13
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* bits.
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*/
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if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I)
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size = 13;
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else
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size = 12;
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*val = axp20x_read_variable_width(info->regmap, chan->address, size);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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}
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static int axp22x_adc_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val)
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{
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struct axp20x_adc_iio *info = iio_priv(indio_dev);
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int size;
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/*
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* N.B.: Unlike the Chinese datasheets tell, the charging current is
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* stored on 12 bits, not 13 bits. Only discharging current is on 13
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* bits.
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*/
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if (chan->type == IIO_CURRENT && chan->channel == AXP22X_BATT_DISCHRG_I)
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size = 13;
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else
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size = 12;
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*val = axp20x_read_variable_width(info->regmap, chan->address, size);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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}
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static int axp813_adc_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val)
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{
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struct axp20x_adc_iio *info = iio_priv(indio_dev);
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*val = axp20x_read_variable_width(info->regmap, chan->address, 12);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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}
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static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
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{
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switch (channel) {
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case AXP20X_ACIN_V:
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case AXP20X_VBUS_V:
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*val = 1;
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*val2 = 700000;
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return IIO_VAL_INT_PLUS_MICRO;
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case AXP20X_GPIO0_V:
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case AXP20X_GPIO1_V:
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*val = 0;
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*val2 = 500000;
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return IIO_VAL_INT_PLUS_MICRO;
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case AXP20X_BATT_V:
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*val = 1;
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*val2 = 100000;
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return IIO_VAL_INT_PLUS_MICRO;
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case AXP20X_IPSOUT_V:
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*val = 1;
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*val2 = 400000;
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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}
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static int axp813_adc_scale_voltage(int channel, int *val, int *val2)
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{
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switch (channel) {
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case AXP813_GPIO0_V:
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*val = 0;
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*val2 = 800000;
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return IIO_VAL_INT_PLUS_MICRO;
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case AXP813_BATT_V:
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*val = 1;
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*val2 = 100000;
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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}
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static int axp20x_adc_scale_current(int channel, int *val, int *val2)
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{
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switch (channel) {
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case AXP20X_ACIN_I:
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*val = 0;
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*val2 = 625000;
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return IIO_VAL_INT_PLUS_MICRO;
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case AXP20X_VBUS_I:
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*val = 0;
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*val2 = 375000;
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return IIO_VAL_INT_PLUS_MICRO;
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case AXP20X_BATT_DISCHRG_I:
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case AXP20X_BATT_CHRG_I:
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*val = 0;
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*val2 = 500000;
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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}
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static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
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int *val2)
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{
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switch (chan->type) {
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case IIO_VOLTAGE:
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return axp20x_adc_scale_voltage(chan->channel, val, val2);
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case IIO_CURRENT:
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return axp20x_adc_scale_current(chan->channel, val, val2);
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case IIO_TEMP:
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*val = 100;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
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int *val2)
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{
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switch (chan->type) {
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case IIO_VOLTAGE:
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if (chan->channel != AXP22X_BATT_V)
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return -EINVAL;
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*val = 1;
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*val2 = 100000;
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CURRENT:
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*val = 0;
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*val2 = 500000;
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_TEMP:
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*val = 100;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val,
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int *val2)
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{
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switch (chan->type) {
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case IIO_VOLTAGE:
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return axp813_adc_scale_voltage(chan->channel, val, val2);
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case IIO_CURRENT:
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*val = 1;
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return IIO_VAL_INT;
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case IIO_TEMP:
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*val = 100;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
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int *val)
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{
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struct axp20x_adc_iio *info = iio_priv(indio_dev);
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int ret;
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ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val);
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if (ret < 0)
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return ret;
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switch (channel) {
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case AXP20X_GPIO0_V:
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*val &= AXP20X_GPIO10_IN_RANGE_GPIO0;
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break;
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case AXP20X_GPIO1_V:
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*val &= AXP20X_GPIO10_IN_RANGE_GPIO1;
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break;
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default:
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return -EINVAL;
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}
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*val = *val ? 700000 : 0;
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return IIO_VAL_INT;
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}
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static int axp20x_adc_offset(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val)
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|
{
|
|
switch (chan->type) {
|
|
case IIO_VOLTAGE:
|
|
return axp20x_adc_offset_voltage(indio_dev, chan->channel, val);
|
|
|
|
case IIO_TEMP:
|
|
*val = -1447;
|
|
return IIO_VAL_INT;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int axp20x_read_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan, int *val,
|
|
int *val2, long mask)
|
|
{
|
|
switch (mask) {
|
|
case IIO_CHAN_INFO_OFFSET:
|
|
return axp20x_adc_offset(indio_dev, chan, val);
|
|
|
|
case IIO_CHAN_INFO_SCALE:
|
|
return axp20x_adc_scale(chan, val, val2);
|
|
|
|
case IIO_CHAN_INFO_RAW:
|
|
return axp20x_adc_raw(indio_dev, chan, val);
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int axp22x_read_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan, int *val,
|
|
int *val2, long mask)
|
|
{
|
|
switch (mask) {
|
|
case IIO_CHAN_INFO_OFFSET:
|
|
*val = -2677;
|
|
return IIO_VAL_INT;
|
|
|
|
case IIO_CHAN_INFO_SCALE:
|
|
return axp22x_adc_scale(chan, val, val2);
|
|
|
|
case IIO_CHAN_INFO_RAW:
|
|
return axp22x_adc_raw(indio_dev, chan, val);
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int axp813_read_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan, int *val,
|
|
int *val2, long mask)
|
|
{
|
|
switch (mask) {
|
|
case IIO_CHAN_INFO_OFFSET:
|
|
*val = -2667;
|
|
return IIO_VAL_INT;
|
|
|
|
case IIO_CHAN_INFO_SCALE:
|
|
return axp813_adc_scale(chan, val, val2);
|
|
|
|
case IIO_CHAN_INFO_RAW:
|
|
return axp813_adc_raw(indio_dev, chan, val);
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static int axp20x_write_raw(struct iio_dev *indio_dev,
|
|
struct iio_chan_spec const *chan, int val, int val2,
|
|
long mask)
|
|
{
|
|
struct axp20x_adc_iio *info = iio_priv(indio_dev);
|
|
unsigned int reg, regval;
|
|
|
|
/*
|
|
* The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets
|
|
* for (independently) GPIO0 and GPIO1 when in ADC mode.
|
|
*/
|
|
if (mask != IIO_CHAN_INFO_OFFSET)
|
|
return -EINVAL;
|
|
|
|
if (val != 0 && val != 700000)
|
|
return -EINVAL;
|
|
|
|
val = val ? 1 : 0;
|
|
|
|
switch (chan->channel) {
|
|
case AXP20X_GPIO0_V:
|
|
reg = AXP20X_GPIO10_IN_RANGE_GPIO0;
|
|
regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val);
|
|
break;
|
|
|
|
case AXP20X_GPIO1_V:
|
|
reg = AXP20X_GPIO10_IN_RANGE_GPIO1;
|
|
regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val);
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg,
|
|
regval);
|
|
}
|
|
|
|
static const struct iio_info axp20x_adc_iio_info = {
|
|
.read_raw = axp20x_read_raw,
|
|
.write_raw = axp20x_write_raw,
|
|
};
|
|
|
|
static const struct iio_info axp22x_adc_iio_info = {
|
|
.read_raw = axp22x_read_raw,
|
|
};
|
|
|
|
static const struct iio_info axp813_adc_iio_info = {
|
|
.read_raw = axp813_read_raw,
|
|
};
|
|
|
|
static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate)
|
|
{
|
|
return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
|
|
AXP20X_ADC_RATE_MASK,
|
|
AXP20X_ADC_RATE_HZ(rate));
|
|
}
|
|
|
|
static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate)
|
|
{
|
|
return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
|
|
AXP20X_ADC_RATE_MASK,
|
|
AXP22X_ADC_RATE_HZ(rate));
|
|
}
|
|
|
|
static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
|
|
{
|
|
return regmap_update_bits(info->regmap, AXP813_ADC_RATE,
|
|
AXP813_ADC_RATE_MASK,
|
|
AXP813_ADC_RATE_HZ(rate));
|
|
}
|
|
|
|
struct axp_data {
|
|
const struct iio_info *iio_info;
|
|
int num_channels;
|
|
struct iio_chan_spec const *channels;
|
|
unsigned long adc_en1_mask;
|
|
int (*adc_rate)(struct axp20x_adc_iio *info,
|
|
int rate);
|
|
bool adc_en2;
|
|
struct iio_map *maps;
|
|
};
|
|
|
|
static const struct axp_data axp20x_data = {
|
|
.iio_info = &axp20x_adc_iio_info,
|
|
.num_channels = ARRAY_SIZE(axp20x_adc_channels),
|
|
.channels = axp20x_adc_channels,
|
|
.adc_en1_mask = AXP20X_ADC_EN1_MASK,
|
|
.adc_rate = axp20x_adc_rate,
|
|
.adc_en2 = true,
|
|
.maps = axp20x_maps,
|
|
};
|
|
|
|
static const struct axp_data axp22x_data = {
|
|
.iio_info = &axp22x_adc_iio_info,
|
|
.num_channels = ARRAY_SIZE(axp22x_adc_channels),
|
|
.channels = axp22x_adc_channels,
|
|
.adc_en1_mask = AXP22X_ADC_EN1_MASK,
|
|
.adc_rate = axp22x_adc_rate,
|
|
.adc_en2 = false,
|
|
.maps = axp22x_maps,
|
|
};
|
|
|
|
static const struct axp_data axp813_data = {
|
|
.iio_info = &axp813_adc_iio_info,
|
|
.num_channels = ARRAY_SIZE(axp813_adc_channels),
|
|
.channels = axp813_adc_channels,
|
|
.adc_en1_mask = AXP22X_ADC_EN1_MASK,
|
|
.adc_rate = axp813_adc_rate,
|
|
.adc_en2 = false,
|
|
.maps = axp22x_maps,
|
|
};
|
|
|
|
static const struct of_device_id axp20x_adc_of_match[] = {
|
|
{ .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
|
|
{ .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
|
|
{ .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
|
|
|
|
static const struct platform_device_id axp20x_adc_id_match[] = {
|
|
{ .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
|
|
{ .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
|
|
{ .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
|
|
{ /* sentinel */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match);
|
|
|
|
static int axp20x_probe(struct platform_device *pdev)
|
|
{
|
|
struct axp20x_adc_iio *info;
|
|
struct iio_dev *indio_dev;
|
|
struct axp20x_dev *axp20x_dev;
|
|
int ret;
|
|
|
|
axp20x_dev = dev_get_drvdata(pdev->dev.parent);
|
|
|
|
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
info = iio_priv(indio_dev);
|
|
platform_set_drvdata(pdev, indio_dev);
|
|
|
|
info->regmap = axp20x_dev->regmap;
|
|
indio_dev->dev.parent = &pdev->dev;
|
|
indio_dev->dev.of_node = pdev->dev.of_node;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
if (!pdev->dev.of_node) {
|
|
const struct platform_device_id *id;
|
|
|
|
id = platform_get_device_id(pdev);
|
|
info->data = (struct axp_data *)id->driver_data;
|
|
} else {
|
|
struct device *dev = &pdev->dev;
|
|
|
|
info->data = (struct axp_data *)of_device_get_match_data(dev);
|
|
}
|
|
|
|
indio_dev->name = platform_get_device_id(pdev)->name;
|
|
indio_dev->info = info->data->iio_info;
|
|
indio_dev->num_channels = info->data->num_channels;
|
|
indio_dev->channels = info->data->channels;
|
|
|
|
/* Enable the ADCs on IP */
|
|
regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask);
|
|
|
|
if (info->data->adc_en2)
|
|
/* Enable GPIO0/1 and internal temperature ADCs */
|
|
regmap_update_bits(info->regmap, AXP20X_ADC_EN2,
|
|
AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK);
|
|
|
|
/* Configure ADCs rate */
|
|
info->data->adc_rate(info, 100);
|
|
|
|
ret = iio_map_array_register(indio_dev, info->data->maps);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret);
|
|
goto fail_map;
|
|
}
|
|
|
|
ret = iio_device_register(indio_dev);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "could not register the device\n");
|
|
goto fail_register;
|
|
}
|
|
|
|
return 0;
|
|
|
|
fail_register:
|
|
iio_map_array_unregister(indio_dev);
|
|
|
|
fail_map:
|
|
regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
|
|
|
|
if (info->data->adc_en2)
|
|
regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int axp20x_remove(struct platform_device *pdev)
|
|
{
|
|
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
|
|
struct axp20x_adc_iio *info = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
iio_map_array_unregister(indio_dev);
|
|
|
|
regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
|
|
|
|
if (info->data->adc_en2)
|
|
regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver axp20x_adc_driver = {
|
|
.driver = {
|
|
.name = "axp20x-adc",
|
|
.of_match_table = of_match_ptr(axp20x_adc_of_match),
|
|
},
|
|
.id_table = axp20x_adc_id_match,
|
|
.probe = axp20x_probe,
|
|
.remove = axp20x_remove,
|
|
};
|
|
|
|
module_platform_driver(axp20x_adc_driver);
|
|
|
|
MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs");
|
|
MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
|
|
MODULE_LICENSE("GPL");
|