b91c26c6a5
During soft reset (e.g., "reboot" from Linux) on some iProc-based SOCs, the LCPLL clock and PERST both go off simultaneously. This seems in accordance with the PCIe Card Electromechanical spec, r2.0, sec 2.2.3, which says the clock goes inactive after PERST# goes active, but doesn't specify how long the clock should be valid after PERST#. However, we have observed that with the iProc Stingray, some Intel NVMe endpoints, e.g., the P3700 400GB series, are not detected correctly upon the next boot sequence unless the clock remains valid for some time after PERST# is asserted. Delay 500ms after asserting PERST# before performing a reboot. The 500ms is experimentally determined. Signed-off-by: Oza Pawandeep <oza.oza@broadcom.com> [bhelgaas: changelog, add spec reference, fold in iproc_pcie_shutdown() export from Arnd Bergmann <arnd@arndb.de>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com>
130 lines
3.6 KiB
C
130 lines
3.6 KiB
C
/*
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* Copyright (C) 2014-2015 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _PCIE_IPROC_H
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#define _PCIE_IPROC_H
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/**
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* iProc PCIe interface type
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*
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* PAXB is the wrapper used in root complex that can be connected to an
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* external endpoint device.
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*
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* PAXC is the wrapper used in root complex dedicated for internal emulated
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* endpoint devices.
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*/
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enum iproc_pcie_type {
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IPROC_PCIE_PAXB_BCMA = 0,
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IPROC_PCIE_PAXB,
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IPROC_PCIE_PAXB_V2,
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IPROC_PCIE_PAXC,
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IPROC_PCIE_PAXC_V2,
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};
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/**
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* iProc PCIe outbound mapping
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* @axi_offset: offset from the AXI address to the internal address used by
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* the iProc PCIe core
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* @nr_windows: total number of supported outbound mapping windows
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*/
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struct iproc_pcie_ob {
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resource_size_t axi_offset;
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unsigned int nr_windows;
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};
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/**
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* iProc PCIe inbound mapping
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* @nr_regions: total number of supported inbound mapping regions
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*/
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struct iproc_pcie_ib {
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unsigned int nr_regions;
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};
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struct iproc_pcie_ob_map;
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struct iproc_pcie_ib_map;
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struct iproc_msi;
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/**
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* iProc PCIe device
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*
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* @dev: pointer to device data structure
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* @type: iProc PCIe interface type
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* @reg_offsets: register offsets
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* @base: PCIe host controller I/O register base
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* @base_addr: PCIe host controller register base physical address
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* @sysdata: Per PCI controller data (ARM-specific)
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* @root_bus: pointer to root bus
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* @phy: optional PHY device that controls the Serdes
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* @map_irq: function callback to map interrupts
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* @ep_is_internal: indicates an internal emulated endpoint device is connected
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* @has_apb_err_disable: indicates the controller can be configured to prevent
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* unsupported request from being forwarded as an APB bus error
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*
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* @need_ob_cfg: indicates SW needs to configure the outbound mapping window
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* @ob: outbound mapping related parameters
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* @ob_map: outbound mapping related parameters specific to the controller
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*
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* @ib: inbound mapping related parameters
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* @ib_map: outbound mapping region related parameters
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*
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* @need_msi_steer: indicates additional configuration of the iProc PCIe
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* controller is required to steer MSI writes to external interrupt controller
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* @msi: MSI data
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*/
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struct iproc_pcie {
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struct device *dev;
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enum iproc_pcie_type type;
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u16 *reg_offsets;
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void __iomem *base;
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phys_addr_t base_addr;
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#ifdef CONFIG_ARM
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struct pci_sys_data sysdata;
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#endif
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struct resource mem;
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struct pci_bus *root_bus;
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struct phy *phy;
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int (*map_irq)(const struct pci_dev *, u8, u8);
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bool ep_is_internal;
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bool has_apb_err_disable;
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bool need_ob_cfg;
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struct iproc_pcie_ob ob;
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const struct iproc_pcie_ob_map *ob_map;
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struct iproc_pcie_ib ib;
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const struct iproc_pcie_ib_map *ib_map;
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bool need_msi_steer;
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struct iproc_msi *msi;
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};
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int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res);
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int iproc_pcie_remove(struct iproc_pcie *pcie);
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int iproc_pcie_shutdown(struct iproc_pcie *pcie);
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#ifdef CONFIG_PCIE_IPROC_MSI
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int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node);
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void iproc_msi_exit(struct iproc_pcie *pcie);
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#else
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static inline int iproc_msi_init(struct iproc_pcie *pcie,
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struct device_node *node)
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{
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return -ENODEV;
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}
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static inline void iproc_msi_exit(struct iproc_pcie *pcie)
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{
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}
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#endif
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#endif /* _PCIE_IPROC_H */
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