![Benjamin Herrenschmidt](/assets/img/avatar_default.png)
The Documentation/memory-barriers.txt document requires that atomic operations that return a value act as a memory barrier both before and after the actual atomic operation. Our current implementation doesn't guarantee this. More specifically, while a load following the isync can not be issued before stwcx. has completed, that completion doesn't architecturally means that the result of stwcx. is visible to other processors (or any previous stores for that matter) (typically, the other processors L1 caches can still hold the old value). This has caused an actual crash in RCU torture testing on Power 7 This fixes it by changing those atomic ops to use new macros instead of RELEASE/ACQUIRE barriers, called ATOMIC_ENTRY and ATMOIC_EXIT barriers, which are then defined respectively to lwsync and sync. I haven't had a chance to measure the performance impact (or rather what I measured with kernel compiles is in the noise, I yet have to find a more precise benchmark) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
58 lines
1.4 KiB
C
58 lines
1.4 KiB
C
#ifndef _ASM_POWERPC_SYNCH_H
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#define _ASM_POWERPC_SYNCH_H
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#ifdef __KERNEL__
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#include <linux/stringify.h>
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#include <asm/feature-fixups.h>
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#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
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#define __SUBARCH_HAS_LWSYNC
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#endif
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#ifndef __ASSEMBLY__
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extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
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extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
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void *fixup_end);
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extern void do_final_fixups(void);
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static inline void eieio(void)
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{
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__asm__ __volatile__ ("eieio" : : : "memory");
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}
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static inline void isync(void)
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{
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__asm__ __volatile__ ("isync" : : : "memory");
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}
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#endif /* __ASSEMBLY__ */
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#if defined(__powerpc64__)
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# define LWSYNC lwsync
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#elif defined(CONFIG_E500)
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# define LWSYNC \
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START_LWSYNC_SECTION(96); \
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sync; \
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MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup);
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#else
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# define LWSYNC sync
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#endif
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#ifdef CONFIG_SMP
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#define __PPC_ACQUIRE_BARRIER \
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START_LWSYNC_SECTION(97); \
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isync; \
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MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
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#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
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#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
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#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(LWSYNC) "\n"
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#define PPC_ATOMIC_EXIT_BARRIER "\n" stringify_in_c(sync) "\n"
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#else
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#define PPC_ACQUIRE_BARRIER
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#define PPC_RELEASE_BARRIER
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#define PPC_ATOMIC_ENTRY_BARRIER
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#define PPC_ATOMIC_EXIT_BARRIER
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_SYNCH_H */
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