ea5d6a8d3e
The manuals do not give them explicit names like in later socs, so more generic names with a s3c2410-prefix were used for them. As it was common to do so in the previous implementation, functionality to change the pll rate is already included. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
103 lines
2 KiB
C
103 lines
2 KiB
C
/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* Copyright (c) 2013 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Common Clock Framework support for all PLL's in Samsung platforms
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*/
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#ifndef __SAMSUNG_CLK_PLL_H
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#define __SAMSUNG_CLK_PLL_H
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enum samsung_pll_type {
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pll_2126,
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pll_3000,
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pll_35xx,
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pll_36xx,
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pll_2550,
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pll_2650,
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pll_4500,
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pll_4502,
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pll_4508,
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pll_4600,
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pll_4650,
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pll_4650c,
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pll_6552,
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pll_6552_s3c2416,
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pll_6553,
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pll_s3c2410_mpll,
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pll_s3c2410_upll,
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pll_s3c2440_mpll,
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};
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#define PLL_35XX_RATE(_rate, _m, _p, _s) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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}
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#define PLL_36XX_RATE(_rate, _m, _p, _s, _k) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.kdiv = (_k), \
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}
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#define PLL_45XX_RATE(_rate, _m, _p, _s, _afc) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.afc = (_afc), \
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}
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#define PLL_4600_RATE(_rate, _m, _p, _s, _k, _vsel) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.kdiv = (_k), \
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.vsel = (_vsel), \
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}
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#define PLL_4650_RATE(_rate, _m, _p, _s, _k, _mfr, _mrr, _vsel) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.kdiv = (_k), \
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.mfr = (_mfr), \
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.mrr = (_mrr), \
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.vsel = (_vsel), \
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}
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/* NOTE: Rate table should be kept sorted in descending order. */
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struct samsung_pll_rate_table {
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unsigned int rate;
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unsigned int pdiv;
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unsigned int mdiv;
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unsigned int sdiv;
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unsigned int kdiv;
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unsigned int afc;
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unsigned int mfr;
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unsigned int mrr;
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unsigned int vsel;
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};
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extern struct clk * __init samsung_clk_register_pll2550x(const char *name,
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const char *pname, const void __iomem *reg_base,
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const unsigned long offset);
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#endif /* __SAMSUNG_CLK_PLL_H */
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