f9a2348196
The Amlogic Meson GX SoCs support an Overlay plane behind the primary plane for video rendering. This Overlay plane support various YUV layouts : - YUYV - NV12 / NV21 - YUV444 / 422 / 420 / 411 / 410 The scaler supports a wide range of scaling ratios, but for simplicity, plane atomic check limits the scaling from x5 to /5 in vertical and horizontal scaling. The z-order is fixed and always behind the primary plane and cannot be changed. The scaling parameter algorithm was taken from the Amlogic vendor kernel code and rewritten to match the atomic universal plane requirements. The video rendering using this overlay plane support has been tested using the new Kodi DRM-KMS Prime rendering path along the in-review V4L2 Mem2Mem Hardware Video Decoder up to 3840x2160 NV12 frames on various display modes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Maxime Jourdan <mjourdan@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/1541497202-20570-2-git-send-email-narmstrong@baylibre.com
52 lines
1.6 KiB
C
52 lines
1.6 KiB
C
/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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* Copyright (C) 2014 Endless Mobile
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/* Canvas LUT Memory */
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#ifndef __MESON_CANVAS_H
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#define __MESON_CANVAS_H
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#define MESON_CANVAS_ID_OSD1 0x4e
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#define MESON_CANVAS_ID_VD1_0 0x60
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#define MESON_CANVAS_ID_VD1_1 0x61
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#define MESON_CANVAS_ID_VD1_2 0x62
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/* Canvas configuration. */
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#define MESON_CANVAS_WRAP_NONE 0x00
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#define MESON_CANVAS_WRAP_X 0x01
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#define MESON_CANVAS_WRAP_Y 0x02
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#define MESON_CANVAS_BLKMODE_LINEAR 0x00
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#define MESON_CANVAS_BLKMODE_32x32 0x01
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#define MESON_CANVAS_BLKMODE_64x64 0x02
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#define MESON_CANVAS_ENDIAN_SWAP16 0x1
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#define MESON_CANVAS_ENDIAN_SWAP32 0x3
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#define MESON_CANVAS_ENDIAN_SWAP64 0x7
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#define MESON_CANVAS_ENDIAN_SWAP128 0xf
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void meson_canvas_setup(struct meson_drm *priv,
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uint32_t canvas_index, uint32_t addr,
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uint32_t stride, uint32_t height,
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unsigned int wrap,
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unsigned int blkmode,
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unsigned int endian);
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#endif /* __MESON_CANVAS_H */
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