![Christian König](/assets/img/avatar_default.png)
Let's support simultaneous submissions to multiple engines. v2: rename the field to num_shared and fix up all users v3: rebased Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
820 lines
20 KiB
C
820 lines
20 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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#include "radeon.h"
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void radeon_gem_object_free(struct drm_gem_object *gobj)
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{
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struct radeon_bo *robj = gem_to_radeon_bo(gobj);
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if (robj) {
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radeon_mn_unregister(robj);
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radeon_bo_unref(&robj);
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}
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}
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int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
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int alignment, int initial_domain,
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u32 flags, bool kernel,
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struct drm_gem_object **obj)
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{
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struct radeon_bo *robj;
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unsigned long max_size;
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int r;
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*obj = NULL;
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/* At least align on page size */
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if (alignment < PAGE_SIZE) {
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alignment = PAGE_SIZE;
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}
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/* Maximum bo size is the unpinned gtt size since we use the gtt to
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* handle vram to system pool migrations.
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*/
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max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
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if (size > max_size) {
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DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
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size >> 20, max_size >> 20);
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return -ENOMEM;
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}
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retry:
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r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
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flags, NULL, NULL, &robj);
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if (r) {
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if (r != -ERESTARTSYS) {
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if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
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initial_domain |= RADEON_GEM_DOMAIN_GTT;
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goto retry;
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}
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DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
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size, initial_domain, alignment, r);
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}
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return r;
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}
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*obj = &robj->gem_base;
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robj->pid = task_pid_nr(current);
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mutex_lock(&rdev->gem.mutex);
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list_add_tail(&robj->list, &rdev->gem.objects);
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mutex_unlock(&rdev->gem.mutex);
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return 0;
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}
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static int radeon_gem_set_domain(struct drm_gem_object *gobj,
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uint32_t rdomain, uint32_t wdomain)
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{
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struct radeon_bo *robj;
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uint32_t domain;
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long r;
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/* FIXME: reeimplement */
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robj = gem_to_radeon_bo(gobj);
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/* work out where to validate the buffer to */
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domain = wdomain;
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if (!domain) {
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domain = rdomain;
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}
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if (!domain) {
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/* Do nothings */
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pr_warn("Set domain without domain !\n");
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return 0;
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}
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if (domain == RADEON_GEM_DOMAIN_CPU) {
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/* Asking for cpu access wait for object idle */
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r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
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if (!r)
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r = -EBUSY;
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if (r < 0 && r != -EINTR) {
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pr_err("Failed to wait for object: %li\n", r);
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return r;
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}
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}
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if (domain == RADEON_GEM_DOMAIN_VRAM && robj->prime_shared_count) {
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/* A BO that is associated with a dma-buf cannot be sensibly migrated to VRAM */
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return -EINVAL;
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}
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return 0;
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}
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int radeon_gem_init(struct radeon_device *rdev)
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{
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INIT_LIST_HEAD(&rdev->gem.objects);
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return 0;
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}
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void radeon_gem_fini(struct radeon_device *rdev)
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{
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radeon_bo_force_delete(rdev);
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}
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/*
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* Call from drm_gem_handle_create which appear in both new and open ioctl
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* case.
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*/
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int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
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{
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struct radeon_bo *rbo = gem_to_radeon_bo(obj);
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struct radeon_device *rdev = rbo->rdev;
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struct radeon_fpriv *fpriv = file_priv->driver_priv;
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struct radeon_vm *vm = &fpriv->vm;
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struct radeon_bo_va *bo_va;
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int r;
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if ((rdev->family < CHIP_CAYMAN) ||
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(!rdev->accel_working)) {
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return 0;
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}
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r = radeon_bo_reserve(rbo, false);
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if (r) {
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return r;
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}
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bo_va = radeon_vm_bo_find(vm, rbo);
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if (!bo_va) {
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bo_va = radeon_vm_bo_add(rdev, vm, rbo);
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} else {
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++bo_va->ref_count;
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}
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radeon_bo_unreserve(rbo);
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return 0;
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}
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void radeon_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file_priv)
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{
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struct radeon_bo *rbo = gem_to_radeon_bo(obj);
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struct radeon_device *rdev = rbo->rdev;
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struct radeon_fpriv *fpriv = file_priv->driver_priv;
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struct radeon_vm *vm = &fpriv->vm;
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struct radeon_bo_va *bo_va;
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int r;
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if ((rdev->family < CHIP_CAYMAN) ||
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(!rdev->accel_working)) {
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return;
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}
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r = radeon_bo_reserve(rbo, true);
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if (r) {
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dev_err(rdev->dev, "leaking bo va because "
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"we fail to reserve bo (%d)\n", r);
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return;
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}
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bo_va = radeon_vm_bo_find(vm, rbo);
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if (bo_va) {
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if (--bo_va->ref_count == 0) {
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radeon_vm_bo_rmv(rdev, bo_va);
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}
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}
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radeon_bo_unreserve(rbo);
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}
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static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
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{
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if (r == -EDEADLK) {
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r = radeon_gpu_reset(rdev);
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if (!r)
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r = -EAGAIN;
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}
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return r;
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}
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/*
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* GEM ioctls.
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*/
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int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_info *args = data;
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struct ttm_mem_type_manager *man;
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man = &rdev->mman.bdev.man[TTM_PL_VRAM];
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args->vram_size = (u64)man->size << PAGE_SHIFT;
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args->vram_visible = rdev->mc.visible_vram_size;
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args->vram_visible -= rdev->vram_pin_size;
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args->gart_size = rdev->mc.gtt_size;
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args->gart_size -= rdev->gart_pin_size;
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return 0;
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}
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int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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/* TODO: implement */
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DRM_ERROR("unimplemented %s\n", __func__);
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return -ENOSYS;
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}
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int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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/* TODO: implement */
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DRM_ERROR("unimplemented %s\n", __func__);
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return -ENOSYS;
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}
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int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_create *args = data;
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struct drm_gem_object *gobj;
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uint32_t handle;
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int r;
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down_read(&rdev->exclusive_lock);
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/* create a gem object to contain this object in */
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args->size = roundup(args->size, PAGE_SIZE);
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r = radeon_gem_object_create(rdev, args->size, args->alignment,
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args->initial_domain, args->flags,
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false, &gobj);
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if (r) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(rdev, r);
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return r;
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}
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r = drm_gem_handle_create(filp, gobj, &handle);
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/* drop reference from allocate - handle holds it now */
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drm_gem_object_put_unlocked(gobj);
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if (r) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(rdev, r);
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return r;
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}
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args->handle = handle;
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up_read(&rdev->exclusive_lock);
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return 0;
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}
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int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct ttm_operation_ctx ctx = { true, false };
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_userptr *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *bo;
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uint32_t handle;
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int r;
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if (offset_in_page(args->addr | args->size))
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return -EINVAL;
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/* reject unknown flag values */
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if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
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RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
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RADEON_GEM_USERPTR_REGISTER))
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return -EINVAL;
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if (args->flags & RADEON_GEM_USERPTR_READONLY) {
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/* readonly pages not tested on older hardware */
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if (rdev->family < CHIP_R600)
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return -EINVAL;
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} else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
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!(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
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/* if we want to write to it we must require anonymous
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memory and install a MMU notifier */
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return -EACCES;
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}
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down_read(&rdev->exclusive_lock);
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/* create a gem object to contain this object in */
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r = radeon_gem_object_create(rdev, args->size, 0,
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RADEON_GEM_DOMAIN_CPU, 0,
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false, &gobj);
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if (r)
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goto handle_lockup;
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bo = gem_to_radeon_bo(gobj);
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r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
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if (r)
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goto release_object;
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if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
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r = radeon_mn_register(bo, args->addr);
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if (r)
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goto release_object;
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}
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if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
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down_read(¤t->mm->mmap_sem);
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r = radeon_bo_reserve(bo, true);
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if (r) {
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up_read(¤t->mm->mmap_sem);
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goto release_object;
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}
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radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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radeon_bo_unreserve(bo);
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up_read(¤t->mm->mmap_sem);
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if (r)
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goto release_object;
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}
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r = drm_gem_handle_create(filp, gobj, &handle);
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/* drop reference from allocate - handle holds it now */
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drm_gem_object_put_unlocked(gobj);
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if (r)
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goto handle_lockup;
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args->handle = handle;
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up_read(&rdev->exclusive_lock);
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return 0;
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release_object:
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drm_gem_object_put_unlocked(gobj);
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handle_lockup:
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(rdev, r);
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return r;
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}
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int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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/* transition the BO to a domain -
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* just validate the BO into a certain domain */
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_set_domain *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r;
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/* for now if someone requests domain CPU -
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* just make sure the buffer is finished with */
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down_read(&rdev->exclusive_lock);
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/* just do a BO wait for now */
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gobj = drm_gem_object_lookup(filp, args->handle);
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if (gobj == NULL) {
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up_read(&rdev->exclusive_lock);
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
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drm_gem_object_put_unlocked(gobj);
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(robj->rdev, r);
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return r;
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}
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int radeon_mode_dumb_mmap(struct drm_file *filp,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p)
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{
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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gobj = drm_gem_object_lookup(filp, handle);
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if (gobj == NULL) {
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
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drm_gem_object_put_unlocked(gobj);
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return -EPERM;
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}
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*offset_p = radeon_bo_mmap_offset(robj);
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drm_gem_object_put_unlocked(gobj);
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return 0;
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}
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int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_mmap *args = data;
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return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
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}
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int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_busy *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r;
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uint32_t cur_placement = 0;
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gobj = drm_gem_object_lookup(filp, args->handle);
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if (gobj == NULL) {
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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r = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
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if (r == 0)
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r = -EBUSY;
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else
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r = 0;
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cur_placement = READ_ONCE(robj->tbo.mem.mem_type);
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args->domain = radeon_mem_type_to_domain(cur_placement);
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drm_gem_object_put_unlocked(gobj);
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return r;
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}
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int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_wait_idle *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r = 0;
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uint32_t cur_placement = 0;
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long ret;
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gobj = drm_gem_object_lookup(filp, args->handle);
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if (gobj == NULL) {
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
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if (ret == 0)
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r = -EBUSY;
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else if (ret < 0)
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r = ret;
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/* Flush HDP cache via MMIO if necessary */
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cur_placement = READ_ONCE(robj->tbo.mem.mem_type);
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if (rdev->asic->mmio_hdp_flush &&
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radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
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robj->rdev->asic->mmio_hdp_flush(rdev);
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drm_gem_object_put_unlocked(gobj);
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r = radeon_gem_handle_lockup(rdev, r);
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return r;
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}
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|
|
int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *filp)
|
|
{
|
|
struct drm_radeon_gem_set_tiling *args = data;
|
|
struct drm_gem_object *gobj;
|
|
struct radeon_bo *robj;
|
|
int r = 0;
|
|
|
|
DRM_DEBUG("%d \n", args->handle);
|
|
gobj = drm_gem_object_lookup(filp, args->handle);
|
|
if (gobj == NULL)
|
|
return -ENOENT;
|
|
robj = gem_to_radeon_bo(gobj);
|
|
r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
|
|
drm_gem_object_put_unlocked(gobj);
|
|
return r;
|
|
}
|
|
|
|
int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *filp)
|
|
{
|
|
struct drm_radeon_gem_get_tiling *args = data;
|
|
struct drm_gem_object *gobj;
|
|
struct radeon_bo *rbo;
|
|
int r = 0;
|
|
|
|
DRM_DEBUG("\n");
|
|
gobj = drm_gem_object_lookup(filp, args->handle);
|
|
if (gobj == NULL)
|
|
return -ENOENT;
|
|
rbo = gem_to_radeon_bo(gobj);
|
|
r = radeon_bo_reserve(rbo, false);
|
|
if (unlikely(r != 0))
|
|
goto out;
|
|
radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
|
|
radeon_bo_unreserve(rbo);
|
|
out:
|
|
drm_gem_object_put_unlocked(gobj);
|
|
return r;
|
|
}
|
|
|
|
/**
|
|
* radeon_gem_va_update_vm -update the bo_va in its VM
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @bo_va: bo_va to update
|
|
*
|
|
* Update the bo_va directly after setting it's address. Errors are not
|
|
* vital here, so they are not reported back to userspace.
|
|
*/
|
|
static void radeon_gem_va_update_vm(struct radeon_device *rdev,
|
|
struct radeon_bo_va *bo_va)
|
|
{
|
|
struct ttm_validate_buffer tv, *entry;
|
|
struct radeon_bo_list *vm_bos;
|
|
struct ww_acquire_ctx ticket;
|
|
struct list_head list;
|
|
unsigned domain;
|
|
int r;
|
|
|
|
INIT_LIST_HEAD(&list);
|
|
|
|
tv.bo = &bo_va->bo->tbo;
|
|
tv.num_shared = 1;
|
|
list_add(&tv.head, &list);
|
|
|
|
vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list);
|
|
if (!vm_bos)
|
|
return;
|
|
|
|
r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
|
|
if (r)
|
|
goto error_free;
|
|
|
|
list_for_each_entry(entry, &list, head) {
|
|
domain = radeon_mem_type_to_domain(entry->bo->mem.mem_type);
|
|
/* if anything is swapped out don't swap it in here,
|
|
just abort and wait for the next CS */
|
|
if (domain == RADEON_GEM_DOMAIN_CPU)
|
|
goto error_unreserve;
|
|
}
|
|
|
|
mutex_lock(&bo_va->vm->mutex);
|
|
r = radeon_vm_clear_freed(rdev, bo_va->vm);
|
|
if (r)
|
|
goto error_unlock;
|
|
|
|
if (bo_va->it.start)
|
|
r = radeon_vm_bo_update(rdev, bo_va, &bo_va->bo->tbo.mem);
|
|
|
|
error_unlock:
|
|
mutex_unlock(&bo_va->vm->mutex);
|
|
|
|
error_unreserve:
|
|
ttm_eu_backoff_reservation(&ticket, &list);
|
|
|
|
error_free:
|
|
kvfree(vm_bos);
|
|
|
|
if (r && r != -ERESTARTSYS)
|
|
DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
|
|
}
|
|
|
|
int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *filp)
|
|
{
|
|
struct drm_radeon_gem_va *args = data;
|
|
struct drm_gem_object *gobj;
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct radeon_fpriv *fpriv = filp->driver_priv;
|
|
struct radeon_bo *rbo;
|
|
struct radeon_bo_va *bo_va;
|
|
u32 invalid_flags;
|
|
int r = 0;
|
|
|
|
if (!rdev->vm_manager.enabled) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
return -ENOTTY;
|
|
}
|
|
|
|
/* !! DONT REMOVE !!
|
|
* We don't support vm_id yet, to be sure we don't have have broken
|
|
* userspace, reject anyone trying to use non 0 value thus moving
|
|
* forward we can use those fields without breaking existant userspace
|
|
*/
|
|
if (args->vm_id) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (args->offset < RADEON_VA_RESERVED_SIZE) {
|
|
dev_err(&dev->pdev->dev,
|
|
"offset 0x%lX is in reserved area 0x%X\n",
|
|
(unsigned long)args->offset,
|
|
RADEON_VA_RESERVED_SIZE);
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* don't remove, we need to enforce userspace to set the snooped flag
|
|
* otherwise we will endup with broken userspace and we won't be able
|
|
* to enable this feature without adding new interface
|
|
*/
|
|
invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
|
|
if ((args->flags & invalid_flags)) {
|
|
dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
|
|
args->flags, invalid_flags);
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (args->operation) {
|
|
case RADEON_VA_MAP:
|
|
case RADEON_VA_UNMAP:
|
|
break;
|
|
default:
|
|
dev_err(&dev->pdev->dev, "unsupported operation %d\n",
|
|
args->operation);
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
return -EINVAL;
|
|
}
|
|
|
|
gobj = drm_gem_object_lookup(filp, args->handle);
|
|
if (gobj == NULL) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
return -ENOENT;
|
|
}
|
|
rbo = gem_to_radeon_bo(gobj);
|
|
r = radeon_bo_reserve(rbo, false);
|
|
if (r) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
drm_gem_object_put_unlocked(gobj);
|
|
return r;
|
|
}
|
|
bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
|
|
if (!bo_va) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
radeon_bo_unreserve(rbo);
|
|
drm_gem_object_put_unlocked(gobj);
|
|
return -ENOENT;
|
|
}
|
|
|
|
switch (args->operation) {
|
|
case RADEON_VA_MAP:
|
|
if (bo_va->it.start) {
|
|
args->operation = RADEON_VA_RESULT_VA_EXIST;
|
|
args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
|
|
radeon_bo_unreserve(rbo);
|
|
goto out;
|
|
}
|
|
r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
|
|
break;
|
|
case RADEON_VA_UNMAP:
|
|
r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
if (!r)
|
|
radeon_gem_va_update_vm(rdev, bo_va);
|
|
args->operation = RADEON_VA_RESULT_OK;
|
|
if (r) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
}
|
|
out:
|
|
drm_gem_object_put_unlocked(gobj);
|
|
return r;
|
|
}
|
|
|
|
int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *filp)
|
|
{
|
|
struct drm_radeon_gem_op *args = data;
|
|
struct drm_gem_object *gobj;
|
|
struct radeon_bo *robj;
|
|
int r;
|
|
|
|
gobj = drm_gem_object_lookup(filp, args->handle);
|
|
if (gobj == NULL) {
|
|
return -ENOENT;
|
|
}
|
|
robj = gem_to_radeon_bo(gobj);
|
|
|
|
r = -EPERM;
|
|
if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
|
|
goto out;
|
|
|
|
r = radeon_bo_reserve(robj, false);
|
|
if (unlikely(r))
|
|
goto out;
|
|
|
|
switch (args->op) {
|
|
case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
|
|
args->value = robj->initial_domain;
|
|
break;
|
|
case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
|
|
robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
|
|
RADEON_GEM_DOMAIN_GTT |
|
|
RADEON_GEM_DOMAIN_CPU);
|
|
break;
|
|
default:
|
|
r = -EINVAL;
|
|
}
|
|
|
|
radeon_bo_unreserve(robj);
|
|
out:
|
|
drm_gem_object_put_unlocked(gobj);
|
|
return r;
|
|
}
|
|
|
|
int radeon_mode_dumb_create(struct drm_file *file_priv,
|
|
struct drm_device *dev,
|
|
struct drm_mode_create_dumb *args)
|
|
{
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct drm_gem_object *gobj;
|
|
uint32_t handle;
|
|
int r;
|
|
|
|
args->pitch = radeon_align_pitch(rdev, args->width,
|
|
DIV_ROUND_UP(args->bpp, 8), 0);
|
|
args->size = args->pitch * args->height;
|
|
args->size = ALIGN(args->size, PAGE_SIZE);
|
|
|
|
r = radeon_gem_object_create(rdev, args->size, 0,
|
|
RADEON_GEM_DOMAIN_VRAM, 0,
|
|
false, &gobj);
|
|
if (r)
|
|
return -ENOMEM;
|
|
|
|
r = drm_gem_handle_create(file_priv, gobj, &handle);
|
|
/* drop reference from allocate - handle holds it now */
|
|
drm_gem_object_put_unlocked(gobj);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
args->handle = handle;
|
|
return 0;
|
|
}
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *)m->private;
|
|
struct drm_device *dev = node->minor->dev;
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct radeon_bo *rbo;
|
|
unsigned i = 0;
|
|
|
|
mutex_lock(&rdev->gem.mutex);
|
|
list_for_each_entry(rbo, &rdev->gem.objects, list) {
|
|
unsigned domain;
|
|
const char *placement;
|
|
|
|
domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
|
|
switch (domain) {
|
|
case RADEON_GEM_DOMAIN_VRAM:
|
|
placement = "VRAM";
|
|
break;
|
|
case RADEON_GEM_DOMAIN_GTT:
|
|
placement = " GTT";
|
|
break;
|
|
case RADEON_GEM_DOMAIN_CPU:
|
|
default:
|
|
placement = " CPU";
|
|
break;
|
|
}
|
|
seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
|
|
i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
|
|
placement, (unsigned long)rbo->pid);
|
|
i++;
|
|
}
|
|
mutex_unlock(&rdev->gem.mutex);
|
|
return 0;
|
|
}
|
|
|
|
static struct drm_info_list radeon_debugfs_gem_list[] = {
|
|
{"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
|
|
};
|
|
#endif
|
|
|
|
int radeon_gem_debugfs_init(struct radeon_device *rdev)
|
|
{
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
|
|
#endif
|
|
return 0;
|
|
}
|