![Jernej Skrabec](/assets/img/avatar_default.png)
Currently sun8i-hdmi-phy driver supports only custom PHYs connected to DW HDMI controller. Since newest Allwinner SoCs have unmodified Synopsys PHY, driver has to be reorganized to support them. Variant structure is expanded to allow differentiation between custom and Sysnopsys PHYs and to hold Synopsys PHY settings. Since DW HDMI bridge platform data has different fields for custom and Sysnopsys PHY, function sun8i_hdmi_phy_get_ops() is replaced with sun8i_hdmi_phy_set_ops(). Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-22-jernej.skrabec@siol.net
281 lines
6.8 KiB
C
281 lines
6.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net>
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*/
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#include <linux/component.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <drm/drm_of.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include "sun8i_dw_hdmi.h"
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#include "sun8i_tcon_top.h"
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static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adj_mode)
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{
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struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder);
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if (hdmi->quirks->set_rate)
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clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000);
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}
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static const struct drm_encoder_helper_funcs
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sun8i_dw_hdmi_encoder_helper_funcs = {
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.mode_set = sun8i_dw_hdmi_encoder_mode_set,
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};
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static const struct drm_encoder_funcs sun8i_dw_hdmi_encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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static enum drm_mode_status
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sun8i_dw_hdmi_mode_valid_a83t(struct drm_connector *connector,
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const struct drm_display_mode *mode)
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{
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if (mode->clock > 297000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static enum drm_mode_status
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sun8i_dw_hdmi_mode_valid_h6(struct drm_connector *connector,
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const struct drm_display_mode *mode)
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{
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/* This is max for HDMI 2.0b (4K@60Hz) */
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if (mode->clock > 594000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node)
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{
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return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
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!!of_match_node(sun8i_tcon_top_of_table, node);
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}
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static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm,
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struct device_node *node)
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{
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struct device_node *port, *ep, *remote, *remote_port;
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u32 crtcs = 0;
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remote = of_graph_get_remote_node(node, 0, -1);
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if (!remote)
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return 0;
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if (sun8i_dw_hdmi_node_is_tcon_top(remote)) {
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port = of_graph_get_port_by_id(remote, 4);
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if (!port)
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goto crtcs_exit;
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for_each_child_of_node(port, ep) {
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remote_port = of_graph_get_remote_port(ep);
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if (remote_port) {
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crtcs |= drm_of_crtc_port_mask(drm, remote_port);
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of_node_put(remote_port);
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}
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}
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} else {
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crtcs = drm_of_find_possible_crtcs(drm, node);
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}
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crtcs_exit:
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of_node_put(remote);
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return crtcs;
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}
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static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
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void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dw_hdmi_plat_data *plat_data;
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struct drm_device *drm = data;
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struct device_node *phy_node;
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struct drm_encoder *encoder;
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struct sun8i_dw_hdmi *hdmi;
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int ret;
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if (!pdev->dev.of_node)
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return -ENODEV;
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hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
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if (!hdmi)
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return -ENOMEM;
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plat_data = &hdmi->plat_data;
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hdmi->dev = &pdev->dev;
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encoder = &hdmi->encoder;
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hdmi->quirks = of_device_get_match_data(dev);
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encoder->possible_crtcs =
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sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node);
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/*
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* If we failed to find the CRTC(s) which this encoder is
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* supposed to be connected to, it's because the CRTC has
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* not been registered yet. Defer probing, and hope that
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* the required CRTC is added later.
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*/
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if (encoder->possible_crtcs == 0)
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return -EPROBE_DEFER;
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hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl");
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if (IS_ERR(hdmi->rst_ctrl)) {
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dev_err(dev, "Could not get ctrl reset control\n");
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return PTR_ERR(hdmi->rst_ctrl);
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}
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hdmi->clk_tmds = devm_clk_get(dev, "tmds");
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if (IS_ERR(hdmi->clk_tmds)) {
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dev_err(dev, "Couldn't get the tmds clock\n");
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return PTR_ERR(hdmi->clk_tmds);
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}
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hdmi->regulator = devm_regulator_get(dev, "hvcc");
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if (IS_ERR(hdmi->regulator)) {
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dev_err(dev, "Couldn't get regulator\n");
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return PTR_ERR(hdmi->regulator);
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}
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ret = regulator_enable(hdmi->regulator);
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if (ret) {
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dev_err(dev, "Failed to enable regulator\n");
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return ret;
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}
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ret = reset_control_deassert(hdmi->rst_ctrl);
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if (ret) {
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dev_err(dev, "Could not deassert ctrl reset control\n");
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goto err_disable_regulator;
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}
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ret = clk_prepare_enable(hdmi->clk_tmds);
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if (ret) {
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dev_err(dev, "Could not enable tmds clock\n");
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goto err_assert_ctrl_reset;
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}
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phy_node = of_parse_phandle(dev->of_node, "phys", 0);
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if (!phy_node) {
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dev_err(dev, "Can't found PHY phandle\n");
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goto err_disable_clk_tmds;
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}
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ret = sun8i_hdmi_phy_probe(hdmi, phy_node);
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of_node_put(phy_node);
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if (ret) {
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dev_err(dev, "Couldn't get the HDMI PHY\n");
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goto err_disable_clk_tmds;
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}
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drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
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drm_encoder_init(drm, encoder, &sun8i_dw_hdmi_encoder_funcs,
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DRM_MODE_ENCODER_TMDS, NULL);
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sun8i_hdmi_phy_init(hdmi->phy);
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plat_data->mode_valid = hdmi->quirks->mode_valid;
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sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
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platform_set_drvdata(pdev, hdmi);
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hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
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/*
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* If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
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* which would have called the encoder cleanup. Do it manually.
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*/
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if (IS_ERR(hdmi->hdmi)) {
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ret = PTR_ERR(hdmi->hdmi);
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goto cleanup_encoder;
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}
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return 0;
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cleanup_encoder:
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drm_encoder_cleanup(encoder);
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sun8i_hdmi_phy_remove(hdmi);
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err_disable_clk_tmds:
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clk_disable_unprepare(hdmi->clk_tmds);
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err_assert_ctrl_reset:
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reset_control_assert(hdmi->rst_ctrl);
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err_disable_regulator:
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regulator_disable(hdmi->regulator);
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return ret;
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}
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static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master,
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void *data)
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{
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struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
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dw_hdmi_unbind(hdmi->hdmi);
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sun8i_hdmi_phy_remove(hdmi);
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clk_disable_unprepare(hdmi->clk_tmds);
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reset_control_assert(hdmi->rst_ctrl);
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regulator_disable(hdmi->regulator);
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}
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static const struct component_ops sun8i_dw_hdmi_ops = {
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.bind = sun8i_dw_hdmi_bind,
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.unbind = sun8i_dw_hdmi_unbind,
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};
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static int sun8i_dw_hdmi_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &sun8i_dw_hdmi_ops);
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}
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static int sun8i_dw_hdmi_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &sun8i_dw_hdmi_ops);
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return 0;
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}
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static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
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.mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
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.set_rate = true,
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};
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static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = {
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.mode_valid = sun8i_dw_hdmi_mode_valid_h6,
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};
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static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
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{
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.compatible = "allwinner,sun8i-a83t-dw-hdmi",
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.data = &sun8i_a83t_quirks,
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},
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{
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.compatible = "allwinner,sun50i-h6-dw-hdmi",
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.data = &sun50i_h6_quirks,
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},
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids);
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static struct platform_driver sun8i_dw_hdmi_pltfm_driver = {
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.probe = sun8i_dw_hdmi_probe,
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.remove = sun8i_dw_hdmi_remove,
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.driver = {
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.name = "sun8i-dw-hdmi",
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.of_match_table = sun8i_dw_hdmi_dt_ids,
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},
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};
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module_platform_driver(sun8i_dw_hdmi_pltfm_driver);
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MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
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MODULE_DESCRIPTION("Allwinner DW HDMI bridge");
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MODULE_LICENSE("GPL");
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