![Joachim Eastwood](/assets/img/avatar_default.png)
Add base support for the 10-bit SAR ADC peripheral found on NXP LPC18xx/43xx SoCs. This is a minimal driver that does not support burst mode, interrupts, DMA or hardware triggers. User manual with register description can be found on: LPC18xx: www.nxp.com/documents/user_manual/UM10430.pdf LPC43xx: www.nxp.com/documents/user_manual/UM10503.pdf Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
232 lines
5.5 KiB
C
232 lines
5.5 KiB
C
/*
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* IIO ADC driver for NXP LPC18xx ADC
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*
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* Copyright (C) 2016 Joachim Eastwood <manabian@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* UNSUPPORTED hardware features:
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* - Hardware triggers
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* - Burst mode
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* - Interrupts
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* - DMA
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/driver.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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/* LPC18XX ADC registers and bits */
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#define LPC18XX_ADC_CR 0x000
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#define LPC18XX_ADC_CR_CLKDIV_SHIFT 8
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#define LPC18XX_ADC_CR_PDN BIT(21)
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#define LPC18XX_ADC_CR_START_NOW (0x1 << 24)
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#define LPC18XX_ADC_GDR 0x004
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/* Data register bits */
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#define LPC18XX_ADC_SAMPLE_SHIFT 6
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#define LPC18XX_ADC_SAMPLE_MASK 0x3ff
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#define LPC18XX_ADC_CONV_DONE BIT(31)
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/* Clock should be 4.5 MHz or less */
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#define LPC18XX_ADC_CLK_TARGET 4500000
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struct lpc18xx_adc {
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struct regulator *vref;
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void __iomem *base;
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struct device *dev;
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struct mutex lock;
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struct clk *clk;
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u32 cr_reg;
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};
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#define LPC18XX_ADC_CHAN(_idx) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = _idx, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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}
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static const struct iio_chan_spec lpc18xx_adc_iio_channels[] = {
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LPC18XX_ADC_CHAN(0),
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LPC18XX_ADC_CHAN(1),
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LPC18XX_ADC_CHAN(2),
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LPC18XX_ADC_CHAN(3),
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LPC18XX_ADC_CHAN(4),
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LPC18XX_ADC_CHAN(5),
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LPC18XX_ADC_CHAN(6),
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LPC18XX_ADC_CHAN(7),
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};
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static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch)
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{
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int ret;
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u32 reg;
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reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW;
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writel(reg, adc->base + LPC18XX_ADC_CR);
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ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg,
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reg & LPC18XX_ADC_CONV_DONE, 3, 9);
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if (ret) {
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dev_warn(adc->dev, "adc read timed out\n");
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return ret;
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}
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return (reg >> LPC18XX_ADC_SAMPLE_SHIFT) & LPC18XX_ADC_SAMPLE_MASK;
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}
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static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct lpc18xx_adc *adc = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&adc->lock);
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*val = lpc18xx_adc_read_chan(adc, chan->channel);
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mutex_unlock(&adc->lock);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = regulator_get_voltage(adc->vref) / 1000;
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*val2 = 10;
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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static const struct iio_info lpc18xx_adc_info = {
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.read_raw = lpc18xx_adc_read_raw,
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.driver_module = THIS_MODULE,
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};
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static int lpc18xx_adc_probe(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev;
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struct lpc18xx_adc *adc;
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struct resource *res;
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unsigned int clkdiv;
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unsigned long rate;
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int ret;
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indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
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if (!indio_dev)
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return -ENOMEM;
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platform_set_drvdata(pdev, indio_dev);
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adc = iio_priv(indio_dev);
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adc->dev = &pdev->dev;
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mutex_init(&adc->lock);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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adc->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(adc->base))
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return PTR_ERR(adc->base);
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adc->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(adc->clk)) {
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dev_err(&pdev->dev, "error getting clock\n");
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return PTR_ERR(adc->clk);
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}
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rate = clk_get_rate(adc->clk);
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clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET);
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adc->vref = devm_regulator_get(&pdev->dev, "vref");
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if (IS_ERR(adc->vref)) {
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dev_err(&pdev->dev, "error getting regulator\n");
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return PTR_ERR(adc->vref);
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}
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indio_dev->name = dev_name(&pdev->dev);
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indio_dev->dev.parent = &pdev->dev;
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indio_dev->info = &lpc18xx_adc_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = lpc18xx_adc_iio_channels;
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indio_dev->num_channels = ARRAY_SIZE(lpc18xx_adc_iio_channels);
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ret = regulator_enable(adc->vref);
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if (ret) {
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dev_err(&pdev->dev, "unable to enable regulator\n");
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return ret;
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}
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ret = clk_prepare_enable(adc->clk);
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if (ret) {
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dev_err(&pdev->dev, "unable to enable clock\n");
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goto dis_reg;
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}
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adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) |
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LPC18XX_ADC_CR_PDN;
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writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR);
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ret = iio_device_register(indio_dev);
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if (ret) {
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dev_err(&pdev->dev, "unable to register device\n");
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goto dis_clk;
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}
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return 0;
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dis_clk:
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writel(0, adc->base + LPC18XX_ADC_CR);
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clk_disable_unprepare(adc->clk);
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dis_reg:
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regulator_disable(adc->vref);
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return ret;
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}
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static int lpc18xx_adc_remove(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev = platform_get_drvdata(pdev);
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struct lpc18xx_adc *adc = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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writel(0, adc->base + LPC18XX_ADC_CR);
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clk_disable_unprepare(adc->clk);
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regulator_disable(adc->vref);
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return 0;
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}
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static const struct of_device_id lpc18xx_adc_match[] = {
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{ .compatible = "nxp,lpc1850-adc" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, lpc18xx_adc_match);
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static struct platform_driver lpc18xx_adc_driver = {
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.probe = lpc18xx_adc_probe,
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.remove = lpc18xx_adc_remove,
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.driver = {
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.name = "lpc18xx-adc",
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.of_match_table = lpc18xx_adc_match,
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},
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};
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module_platform_driver(lpc18xx_adc_driver);
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MODULE_DESCRIPTION("LPC18xx ADC driver");
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MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
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MODULE_LICENSE("GPL v2");
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