2c14736c75
This adds a clock driver that handles the specific muxes, dividers and gates of rk3188 and rk3066 SoCs. The structure of the clock list resembles the arrangement of their counterparts in the clock architecture diagrams found in the SoC documentation. Clocks exported to the clock provider are currently limited to well known or measured ones. So additional clock exports may be necessary in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/clock/rk3188-cru-common.h>
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/* soft-reset indices */
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#define SRST_PTM_CORE2 0
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#define SRST_PTM_CORE3 1
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#define SRST_CORE2 5
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#define SRST_CORE3 6
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#define SRST_CORE2_DBG 10
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#define SRST_CORE3_DBG 11
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#define SRST_TIMER2 16
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#define SRST_TIMER4 23
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#define SRST_I2S0 24
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#define SRST_TIMER5 25
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#define SRST_TIMER3 29
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#define SRST_TIMER6 31
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#define SRST_PTM3 36
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#define SRST_PTM3_ATB 37
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#define SRST_GPS 67
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#define SRST_HSICPHY 75
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#define SRST_TIMER 78
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#define SRST_PTM2 92
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#define SRST_CORE2_WDT 94
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#define SRST_CORE3_WDT 95
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#define SRST_PTM2_ATB 111
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#define SRST_HSIC 117
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#define SRST_CTI2 118
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#define SRST_CTI2_APB 119
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#define SRST_GPU_BRIDGE 121
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#define SRST_CTI3 123
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#define SRST_CTI3_APB 124
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