![Linus Torvalds](/assets/img/avatar_default.png)
- Fix a regression in leds-gpio introduced by a recent commit that inadvertently changed the name of one of the properties used by the driver (Fabio Estevam). - Fix a regression in the ACPI backlight driver introduced by a recent fix that missed one special case that had to be taken into account (Aaron Lu). - Drop the level of some new kernel messages from the ACPI core introduced by a recent commit to KERN_DEBUG which they should have used from the start and drop some other unuseful KERN_ERR messages printed by ACPI (Rafael J Wysocki). - Revert an incorrect commit modifying the cpupower tool (Prarit Bhargava). - Fix two regressions introduced by recent commits in the OPP library and clean up some existing minor issues in that code (Viresh Kumar). - Continue to replace CONFIG_PM_RUNTIME with CONFIG_PM throughout the tree (or drop it where that can be done) in order to make it possible to eliminate CONFIG_PM_RUNTIME (Rafael J Wysocki, Ulf Hansson, Ludovic Desroches). There will be one more "CONFIG_PM_RUNTIME removal" batch after this one, because some new uses of it have been introduced during the current merge window, but that should be sufficient to finally get rid of it. - Make the ACPI EC driver more robust against race conditions related to GPE handler installation failures (Lv Zheng). - Prevent the ACPI device PM core code from attempting to disable GPEs that it has not enabled which confuses ACPICA and makes it report errors unnecessarily (Rafael J Wysocki). - Add a "force" command line switch to the intel_pstate driver to make it possible to override the blacklisting of some systems in that driver if needed (Ethan Zhao). - Improve intel_pstate code documentation and add a MAINTAINERS entry for it (Kristen Carlson Accardi). - Make the ACPI fan driver create cooling device interfaces witn names that reflect the IDs of the ACPI device objects they are associated with, except for "generic" ACPI fans (PNP ID "PNP0C0B"). That's necessary for user space thermal management tools to be able to connect the fans with the parts of the system they are supposed to be cooling properly. From Srinivas Pandruvada. / -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJUk0IDAAoJEILEb/54YlRx7fgP/3+yF/0TnEW93j2ALDAQFiLF tSv2A2vQC8vtMJjjWx0z/HqPh86gfaReEFZmUJD/Q/e2LXEnxNZJ+QMjcekPVkDM mTvcIMc2MR8vOA/oMkgxeaKregrrx7RkCfojd+NWZhVukkjl+mvBHgAnYjXRL+NZ unDWGlbHG97vq/3kGjPYhDS00nxHblw8NHFBu5HL5RxwABdWoeZJITwqxXWyuPLw nlqNWlOxmwvtSbw2VMKz0uof1nFHyQLykYsMG0ZsyayCRdWUZYkEqmE7GGpCLkLu D6yfmlpen6ccIOsEAae0eXBt50IFY9Tihk5lovx1mZmci2SNRg29BqMI105wIn0u 8b8Ej7MNHp7yMxRpB5WfU90p/y7ioJns9guFZxY0CKaRnrI2+BLt3RscMi3MPI06 Cu2/WkSSa09fhDPA+pk+VDYsmWgyVawigesNmMP5/cvYO/yYywVRjOuO1k77qQGp 4dSpFYEHfpxinejZnVZOk2V9MkvSLoSMux6wPV0xM0IE1iD0ulVpHjTJrwp80ph4 +bfUFVr/vrD1y7EKbf1PD363ZKvJhWhvQWDgETsM1vgLf21PfWO7C2kflIAsWsdQ 1ukD5nCBRlP4K73hG7bdM6kRztXhUdR0SHg85/t0KB/ExiVqtcXIzB60D0G1lENd QlKbq3O4lim1WGuhazQY =5fo2 -----END PGP SIGNATURE----- Merge tag 'pm+acpi-3.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull more ACPI and power management updates from Rafael Wysocki: "These are regression fixes (leds-gpio, ACPI backlight driver, operating performance points library, ACPI device enumeration messages, cpupower tool), other bug fixes (ACPI EC driver, ACPI device PM), some cleanups in the operating performance points (OPP) framework, continuation of CONFIG_PM_RUNTIME elimination, a couple of minor intel_pstate driver changes, a new MAINTAINERS entry for it and an ACPI fan driver change needed for better support of thermal management in user space. Specifics: - Fix a regression in leds-gpio introduced by a recent commit that inadvertently changed the name of one of the properties used by the driver (Fabio Estevam). - Fix a regression in the ACPI backlight driver introduced by a recent fix that missed one special case that had to be taken into account (Aaron Lu). - Drop the level of some new kernel messages from the ACPI core introduced by a recent commit to KERN_DEBUG which they should have used from the start and drop some other unuseful KERN_ERR messages printed by ACPI (Rafael J Wysocki). - Revert an incorrect commit modifying the cpupower tool (Prarit Bhargava). - Fix two regressions introduced by recent commits in the OPP library and clean up some existing minor issues in that code (Viresh Kumar). - Continue to replace CONFIG_PM_RUNTIME with CONFIG_PM throughout the tree (or drop it where that can be done) in order to make it possible to eliminate CONFIG_PM_RUNTIME (Rafael J Wysocki, Ulf Hansson, Ludovic Desroches). There will be one more "CONFIG_PM_RUNTIME removal" batch after this one, because some new uses of it have been introduced during the current merge window, but that should be sufficient to finally get rid of it. - Make the ACPI EC driver more robust against race conditions related to GPE handler installation failures (Lv Zheng). - Prevent the ACPI device PM core code from attempting to disable GPEs that it has not enabled which confuses ACPICA and makes it report errors unnecessarily (Rafael J Wysocki). - Add a "force" command line switch to the intel_pstate driver to make it possible to override the blacklisting of some systems in that driver if needed (Ethan Zhao). - Improve intel_pstate code documentation and add a MAINTAINERS entry for it (Kristen Carlson Accardi). - Make the ACPI fan driver create cooling device interfaces witn names that reflect the IDs of the ACPI device objects they are associated with, except for "generic" ACPI fans (PNP ID "PNP0C0B"). That's necessary for user space thermal management tools to be able to connect the fans with the parts of the system they are supposed to be cooling properly. From Srinivas Pandruvada" * tag 'pm+acpi-3.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (32 commits) MAINTAINERS: add entry for intel_pstate ACPI / video: update the skip case for acpi_video_device_in_dod() power / PM: Eliminate CONFIG_PM_RUNTIME NFC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM SCSI / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM ACPI / EC: Fix unexpected ec_remove_handlers() invocations Revert "tools: cpupower: fix return checks for sysfs_get_idlestate_count()" tracing / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM x86 / PM: Replace CONFIG_PM_RUNTIME in io_apic.c PM: Remove the SET_PM_RUNTIME_PM_OPS() macro mmc: atmel-mci: use SET_RUNTIME_PM_OPS() macro PM / Kconfig: Replace PM_RUNTIME with PM in dependencies ARM / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM sound / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM phy / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM video / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM tty / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM spi: Replace CONFIG_PM_RUNTIME with CONFIG_PM ACPI / PM: Do not disable wakeup GPEs that have not been enabled ACPI / utils: Drop error messages from acpi_evaluate_reference() ...
532 lines
13 KiB
C
532 lines
13 KiB
C
/*
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* phy-ti-pipe3 - PIPE3 PHY driver.
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Author: Kishon Vijay Abraham I <kishon@ti.com>
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/phy/phy.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/delay.h>
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#include <linux/phy/omap_control_phy.h>
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#include <linux/of_platform.h>
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#define PLL_STATUS 0x00000004
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#define PLL_GO 0x00000008
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#define PLL_CONFIGURATION1 0x0000000C
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#define PLL_CONFIGURATION2 0x00000010
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#define PLL_CONFIGURATION3 0x00000014
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#define PLL_CONFIGURATION4 0x00000020
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#define PLL_REGM_MASK 0x001FFE00
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#define PLL_REGM_SHIFT 0x9
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#define PLL_REGM_F_MASK 0x0003FFFF
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#define PLL_REGM_F_SHIFT 0x0
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#define PLL_REGN_MASK 0x000001FE
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#define PLL_REGN_SHIFT 0x1
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#define PLL_SELFREQDCO_MASK 0x0000000E
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#define PLL_SELFREQDCO_SHIFT 0x1
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#define PLL_SD_MASK 0x0003FC00
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#define PLL_SD_SHIFT 10
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#define SET_PLL_GO 0x1
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#define PLL_LDOPWDN BIT(15)
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#define PLL_TICOPWDN BIT(16)
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#define PLL_LOCK 0x2
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#define PLL_IDLE 0x1
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/*
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* This is an Empirical value that works, need to confirm the actual
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* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
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* to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
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*/
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#define PLL_IDLE_TIME 100 /* in milliseconds */
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#define PLL_LOCK_TIME 100 /* in milliseconds */
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struct pipe3_dpll_params {
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u16 m;
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u8 n;
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u8 freq:3;
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u8 sd;
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u32 mf;
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};
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struct pipe3_dpll_map {
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unsigned long rate;
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struct pipe3_dpll_params params;
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};
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struct ti_pipe3 {
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void __iomem *pll_ctrl_base;
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struct device *dev;
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struct device *control_dev;
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struct clk *wkupclk;
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struct clk *sys_clk;
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struct clk *refclk;
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struct clk *div_clk;
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struct pipe3_dpll_map *dpll_map;
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u8 id;
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};
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static struct pipe3_dpll_map dpll_map_usb[] = {
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{12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */
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{16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
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{19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
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{20000000, {1000, 7, 4, 10, 0} }, /* 20 MHz */
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{26000000, {1250, 12, 4, 20, 0} }, /* 26 MHz */
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{38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
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{ }, /* Terminator */
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};
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static struct pipe3_dpll_map dpll_map_sata[] = {
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{12000000, {1000, 7, 4, 6, 0} }, /* 12 MHz */
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{16800000, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
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{19200000, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
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{20000000, {600, 7, 4, 6, 0} }, /* 20 MHz */
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{26000000, {461, 7, 4, 6, 0} }, /* 26 MHz */
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{38400000, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
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{ }, /* Terminator */
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};
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static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
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{
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return __raw_readl(addr + offset);
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}
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static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,
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u32 data)
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{
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__raw_writel(data, addr + offset);
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}
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static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
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{
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unsigned long rate;
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struct pipe3_dpll_map *dpll_map = phy->dpll_map;
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rate = clk_get_rate(phy->sys_clk);
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for (; dpll_map->rate; dpll_map++) {
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if (rate == dpll_map->rate)
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return &dpll_map->params;
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}
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dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);
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return NULL;
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}
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static int ti_pipe3_power_off(struct phy *x)
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{
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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omap_control_phy_power(phy->control_dev, 0);
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return 0;
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}
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static int ti_pipe3_power_on(struct phy *x)
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{
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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omap_control_phy_power(phy->control_dev, 1);
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return 0;
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}
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static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)
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{
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u32 val;
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unsigned long timeout;
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timeout = jiffies + msecs_to_jiffies(PLL_LOCK_TIME);
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do {
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cpu_relax();
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (val & PLL_LOCK)
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break;
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} while (!time_after(jiffies, timeout));
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if (!(val & PLL_LOCK)) {
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dev_err(phy->dev, "DPLL failed to lock\n");
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return -EBUSY;
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}
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return 0;
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}
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static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)
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{
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u32 val;
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struct pipe3_dpll_params *dpll_params;
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dpll_params = ti_pipe3_get_dpll_params(phy);
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if (!dpll_params)
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return -EINVAL;
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
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val &= ~PLL_REGN_MASK;
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val |= dpll_params->n << PLL_REGN_SHIFT;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val &= ~PLL_SELFREQDCO_MASK;
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val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
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val &= ~PLL_REGM_MASK;
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val |= dpll_params->m << PLL_REGM_SHIFT;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
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val &= ~PLL_REGM_F_MASK;
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val |= dpll_params->mf << PLL_REGM_F_SHIFT;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
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val &= ~PLL_SD_MASK;
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val |= dpll_params->sd << PLL_SD_SHIFT;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
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return ti_pipe3_dpll_wait_lock(phy);
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}
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static int ti_pipe3_init(struct phy *x)
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{
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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u32 val;
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int ret = 0;
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if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) {
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omap_control_pcie_pcs(phy->control_dev, phy->id, 0xF1);
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return 0;
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}
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/* Bring it out of IDLE if it is IDLE */
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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if (val & PLL_IDLE) {
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val &= ~PLL_IDLE;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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ret = ti_pipe3_dpll_wait_lock(phy);
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}
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/* Program the DPLL only if not locked */
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (!(val & PLL_LOCK))
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if (ti_pipe3_dpll_program(phy))
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return -EINVAL;
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return ret;
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}
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static int ti_pipe3_exit(struct phy *x)
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{
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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u32 val;
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unsigned long timeout;
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/* SATA DPLL can't be powered down due to Errata i783 and PCIe
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* does not have internal DPLL
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*/
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if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") ||
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of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie"))
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return 0;
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/* Put DPLL in IDLE mode */
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val |= PLL_IDLE;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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/* wait for LDO and Oscillator to power down */
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timeout = jiffies + msecs_to_jiffies(PLL_IDLE_TIME);
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do {
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cpu_relax();
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
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if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN))
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break;
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} while (!time_after(jiffies, timeout));
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if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
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dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n",
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val);
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return -EBUSY;
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}
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return 0;
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}
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static struct phy_ops ops = {
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.init = ti_pipe3_init,
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.exit = ti_pipe3_exit,
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.power_on = ti_pipe3_power_on,
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.power_off = ti_pipe3_power_off,
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.owner = THIS_MODULE,
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};
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#ifdef CONFIG_OF
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static const struct of_device_id ti_pipe3_id_table[];
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#endif
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static int ti_pipe3_probe(struct platform_device *pdev)
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{
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struct ti_pipe3 *phy;
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struct phy *generic_phy;
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struct phy_provider *phy_provider;
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struct resource *res;
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struct device_node *node = pdev->dev.of_node;
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struct device_node *control_node;
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struct platform_device *control_pdev;
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const struct of_device_id *match;
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struct clk *clk;
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phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
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if (!phy)
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return -ENOMEM;
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phy->dev = &pdev->dev;
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if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
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match = of_match_device(of_match_ptr(ti_pipe3_id_table),
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&pdev->dev);
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if (!match)
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return -EINVAL;
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phy->dpll_map = (struct pipe3_dpll_map *)match->data;
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if (!phy->dpll_map) {
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dev_err(&pdev->dev, "no DPLL data\n");
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return -EINVAL;
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"pll_ctrl");
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phy->pll_ctrl_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(phy->pll_ctrl_base))
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return PTR_ERR(phy->pll_ctrl_base);
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phy->sys_clk = devm_clk_get(phy->dev, "sysclk");
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if (IS_ERR(phy->sys_clk)) {
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dev_err(&pdev->dev, "unable to get sysclk\n");
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return -EINVAL;
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}
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}
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if (!of_device_is_compatible(node, "ti,phy-pipe3-sata")) {
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phy->wkupclk = devm_clk_get(phy->dev, "wkupclk");
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if (IS_ERR(phy->wkupclk)) {
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dev_err(&pdev->dev, "unable to get wkupclk\n");
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return PTR_ERR(phy->wkupclk);
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}
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phy->refclk = devm_clk_get(phy->dev, "refclk");
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if (IS_ERR(phy->refclk)) {
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dev_err(&pdev->dev, "unable to get refclk\n");
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return PTR_ERR(phy->refclk);
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}
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} else {
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phy->wkupclk = ERR_PTR(-ENODEV);
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phy->refclk = ERR_PTR(-ENODEV);
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}
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if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
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if (of_property_read_u8(node, "id", &phy->id) < 0)
|
|
phy->id = 1;
|
|
|
|
clk = devm_clk_get(phy->dev, "dpll_ref");
|
|
if (IS_ERR(clk)) {
|
|
dev_err(&pdev->dev, "unable to get dpll ref clk\n");
|
|
return PTR_ERR(clk);
|
|
}
|
|
clk_set_rate(clk, 1500000000);
|
|
|
|
clk = devm_clk_get(phy->dev, "dpll_ref_m2");
|
|
if (IS_ERR(clk)) {
|
|
dev_err(&pdev->dev, "unable to get dpll ref m2 clk\n");
|
|
return PTR_ERR(clk);
|
|
}
|
|
clk_set_rate(clk, 100000000);
|
|
|
|
clk = devm_clk_get(phy->dev, "phy-div");
|
|
if (IS_ERR(clk)) {
|
|
dev_err(&pdev->dev, "unable to get phy-div clk\n");
|
|
return PTR_ERR(clk);
|
|
}
|
|
clk_set_rate(clk, 100000000);
|
|
|
|
phy->div_clk = devm_clk_get(phy->dev, "div-clk");
|
|
if (IS_ERR(phy->div_clk)) {
|
|
dev_err(&pdev->dev, "unable to get div-clk\n");
|
|
return PTR_ERR(phy->div_clk);
|
|
}
|
|
} else {
|
|
phy->div_clk = ERR_PTR(-ENODEV);
|
|
}
|
|
|
|
control_node = of_parse_phandle(node, "ctrl-module", 0);
|
|
if (!control_node) {
|
|
dev_err(&pdev->dev, "Failed to get control device phandle\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
control_pdev = of_find_device_by_node(control_node);
|
|
if (!control_pdev) {
|
|
dev_err(&pdev->dev, "Failed to get control device\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
phy->control_dev = &control_pdev->dev;
|
|
|
|
omap_control_phy_power(phy->control_dev, 0);
|
|
|
|
platform_set_drvdata(pdev, phy);
|
|
pm_runtime_enable(phy->dev);
|
|
|
|
generic_phy = devm_phy_create(phy->dev, NULL, &ops);
|
|
if (IS_ERR(generic_phy))
|
|
return PTR_ERR(generic_phy);
|
|
|
|
phy_set_drvdata(generic_phy, phy);
|
|
phy_provider = devm_of_phy_provider_register(phy->dev,
|
|
of_phy_simple_xlate);
|
|
if (IS_ERR(phy_provider))
|
|
return PTR_ERR(phy_provider);
|
|
|
|
pm_runtime_get(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ti_pipe3_remove(struct platform_device *pdev)
|
|
{
|
|
if (!pm_runtime_suspended(&pdev->dev))
|
|
pm_runtime_put(&pdev->dev);
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int ti_pipe3_runtime_suspend(struct device *dev)
|
|
{
|
|
struct ti_pipe3 *phy = dev_get_drvdata(dev);
|
|
|
|
if (!IS_ERR(phy->wkupclk))
|
|
clk_disable_unprepare(phy->wkupclk);
|
|
if (!IS_ERR(phy->refclk))
|
|
clk_disable_unprepare(phy->refclk);
|
|
if (!IS_ERR(phy->div_clk))
|
|
clk_disable_unprepare(phy->div_clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ti_pipe3_runtime_resume(struct device *dev)
|
|
{
|
|
u32 ret = 0;
|
|
struct ti_pipe3 *phy = dev_get_drvdata(dev);
|
|
|
|
if (!IS_ERR(phy->refclk)) {
|
|
ret = clk_prepare_enable(phy->refclk);
|
|
if (ret) {
|
|
dev_err(phy->dev, "Failed to enable refclk %d\n", ret);
|
|
goto err1;
|
|
}
|
|
}
|
|
|
|
if (!IS_ERR(phy->wkupclk)) {
|
|
ret = clk_prepare_enable(phy->wkupclk);
|
|
if (ret) {
|
|
dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret);
|
|
goto err2;
|
|
}
|
|
}
|
|
|
|
if (!IS_ERR(phy->div_clk)) {
|
|
ret = clk_prepare_enable(phy->div_clk);
|
|
if (ret) {
|
|
dev_err(phy->dev, "Failed to enable div_clk %d\n", ret);
|
|
goto err3;
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
err3:
|
|
if (!IS_ERR(phy->wkupclk))
|
|
clk_disable_unprepare(phy->wkupclk);
|
|
|
|
err2:
|
|
if (!IS_ERR(phy->refclk))
|
|
clk_disable_unprepare(phy->refclk);
|
|
|
|
err1:
|
|
return ret;
|
|
}
|
|
|
|
static const struct dev_pm_ops ti_pipe3_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(ti_pipe3_runtime_suspend,
|
|
ti_pipe3_runtime_resume, NULL)
|
|
};
|
|
|
|
#define DEV_PM_OPS (&ti_pipe3_pm_ops)
|
|
#else
|
|
#define DEV_PM_OPS NULL
|
|
#endif
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id ti_pipe3_id_table[] = {
|
|
{
|
|
.compatible = "ti,phy-usb3",
|
|
.data = dpll_map_usb,
|
|
},
|
|
{
|
|
.compatible = "ti,omap-usb3",
|
|
.data = dpll_map_usb,
|
|
},
|
|
{
|
|
.compatible = "ti,phy-pipe3-sata",
|
|
.data = dpll_map_sata,
|
|
},
|
|
{
|
|
.compatible = "ti,phy-pipe3-pcie",
|
|
},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ti_pipe3_id_table);
|
|
#endif
|
|
|
|
static struct platform_driver ti_pipe3_driver = {
|
|
.probe = ti_pipe3_probe,
|
|
.remove = ti_pipe3_remove,
|
|
.driver = {
|
|
.name = "ti-pipe3",
|
|
.pm = DEV_PM_OPS,
|
|
.of_match_table = of_match_ptr(ti_pipe3_id_table),
|
|
},
|
|
};
|
|
|
|
module_platform_driver(ti_pipe3_driver);
|
|
|
|
MODULE_ALIAS("platform: ti_pipe3");
|
|
MODULE_AUTHOR("Texas Instruments Inc.");
|
|
MODULE_DESCRIPTION("TI PIPE3 phy driver");
|
|
MODULE_LICENSE("GPL v2");
|