da58fb6571
This adds support to the kernel proper for booting via UEFI. It shares most of the code with arm64, so this patch mostly just wires it up for use with ARM. Note that this does not include the EFI stub, it is added in a subsequent patch. Tested-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Matt Fleming <matt@codeblueprint.co.uk> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
143 lines
3.7 KiB
C
143 lines
3.7 KiB
C
/*
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* arch/arm/include/asm/mmu_context.h
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*
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* Copyright (C) 1996 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 27-06-1996 RMK Created
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*/
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#ifndef __ASM_ARM_MMU_CONTEXT_H
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#define __ASM_ARM_MMU_CONTEXT_H
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#include <linux/compiler.h>
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#include <linux/sched.h>
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#include <asm/cacheflush.h>
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#include <asm/cachetype.h>
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#include <asm/proc-fns.h>
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#include <asm/smp_plat.h>
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#include <asm-generic/mm_hooks.h>
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void __check_vmalloc_seq(struct mm_struct *mm);
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#ifdef CONFIG_CPU_HAS_ASID
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void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
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#define init_new_context(tsk,mm) ({ atomic64_set(&(mm)->context.id, 0); 0; })
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#ifdef CONFIG_ARM_ERRATA_798181
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void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm,
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cpumask_t *mask);
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#else /* !CONFIG_ARM_ERRATA_798181 */
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static inline void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm,
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cpumask_t *mask)
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{
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}
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#endif /* CONFIG_ARM_ERRATA_798181 */
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#else /* !CONFIG_CPU_HAS_ASID */
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#ifdef CONFIG_MMU
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static inline void check_and_switch_context(struct mm_struct *mm,
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struct task_struct *tsk)
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{
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if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
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__check_vmalloc_seq(mm);
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if (irqs_disabled())
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/*
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* cpu_switch_mm() needs to flush the VIVT caches. To avoid
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* high interrupt latencies, defer the call and continue
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* running with the old mm. Since we only support UP systems
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* on non-ASID CPUs, the old mm will remain valid until the
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* finish_arch_post_lock_switch() call.
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*/
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mm->context.switch_pending = 1;
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else
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cpu_switch_mm(mm->pgd, mm);
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}
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#define finish_arch_post_lock_switch \
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finish_arch_post_lock_switch
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static inline void finish_arch_post_lock_switch(void)
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{
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struct mm_struct *mm = current->mm;
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if (mm && mm->context.switch_pending) {
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/*
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* Preemption must be disabled during cpu_switch_mm() as we
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* have some stateful cache flush implementations. Check
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* switch_pending again in case we were preempted and the
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* switch to this mm was already done.
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*/
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preempt_disable();
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if (mm->context.switch_pending) {
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mm->context.switch_pending = 0;
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cpu_switch_mm(mm->pgd, mm);
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}
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preempt_enable_no_resched();
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}
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}
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#endif /* CONFIG_MMU */
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#define init_new_context(tsk,mm) 0
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#endif /* CONFIG_CPU_HAS_ASID */
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#define destroy_context(mm) do { } while(0)
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#define activate_mm(prev,next) switch_mm(prev, next, NULL)
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/*
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* This is called when "tsk" is about to enter lazy TLB mode.
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*
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* mm: describes the currently active mm context
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* tsk: task which is entering lazy tlb
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* cpu: cpu number which is entering lazy tlb
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*
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* tsk->mm will be NULL
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*/
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static inline void
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enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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/*
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* This is the actual mm switch as far as the scheduler
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* is concerned. No registers are touched. We avoid
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* calling the CPU specific function when the mm hasn't
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* actually changed.
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*/
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static inline void
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switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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#ifdef CONFIG_MMU
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unsigned int cpu = smp_processor_id();
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/*
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* __sync_icache_dcache doesn't broadcast the I-cache invalidation,
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* so check for possible thread migration and invalidate the I-cache
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* if we're new to this CPU.
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*/
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if (cache_ops_need_broadcast() &&
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!cpumask_empty(mm_cpumask(next)) &&
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!cpumask_test_cpu(cpu, mm_cpumask(next)))
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__flush_icache_all();
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if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) {
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check_and_switch_context(next, tsk);
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if (cache_is_vivt())
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cpumask_clear_cpu(cpu, mm_cpumask(prev));
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}
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#endif
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}
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#define deactivate_mm(tsk,mm) do { } while (0)
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#endif
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