![Will Deacon](/assets/img/avatar_default.png)
The cost of changing a cacheline from shared to exclusive state can be significant, especially when this is triggered by an exclusive store, since it may result in having to retry the transaction. This patch prefixes our {spin,read,write}_[try]lock implementations with pldw instructions (on CPUs which support them) to try and grab the line in exclusive state from the start. arch_rwlock_t is changed to avoid using a volatile member, since this generates compiler warnings when falling back on the __builtin_prefetch intrinsic which expects a const void * argument. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
34 lines
502 B
C
34 lines
502 B
C
#ifndef __ASM_SPINLOCK_TYPES_H
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#define __ASM_SPINLOCK_TYPES_H
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#ifndef __LINUX_SPINLOCK_TYPES_H
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# error "please don't include this file directly"
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#endif
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#define TICKET_SHIFT 16
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typedef struct {
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union {
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u32 slock;
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struct __raw_tickets {
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#ifdef __ARMEB__
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u16 next;
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u16 owner;
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#else
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u16 owner;
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u16 next;
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#endif
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} tickets;
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};
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} arch_spinlock_t;
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#define __ARCH_SPIN_LOCK_UNLOCKED { { 0 } }
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typedef struct {
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u32 lock;
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} arch_rwlock_t;
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#define __ARCH_RW_LOCK_UNLOCKED { 0 }
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#endif
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