377 lines
9.8 KiB
C
377 lines
9.8 KiB
C
/****************************************************************************
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2014 - 2018 Vivante Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*****************************************************************************
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*
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* The GPL License (GPL)
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*
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* Copyright (C) 2014 - 2018 Vivante Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*****************************************************************************
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*
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* Note: This software is released under dual MIT and GPL licenses. A
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* recipient may use this file under the terms of either the MIT license or
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* GPL License. If you wish to use only one license not the other, you can
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* indicate your decision by deleting one of the above license notices in your
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* version of this file.
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*
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*****************************************************************************/
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#ifndef __gc_hal_kernel_hardware_h_
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#define __gc_hal_kernel_hardware_h_
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#if gcdENABLE_VG
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#include "gc_hal_kernel_hardware_vg.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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gcvHARDWARE_FUNCTION_MMU,
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gcvHARDWARE_FUNCTION_FLUSH,
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/* BLT engine command sequence. */
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gcvHARDWARE_FUNCTION_BLT_EVENT,
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gcvHARDWARE_FUNCTION_DUMMY_DRAW,
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gcvHARDWARE_FUNCTION_NUM,
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}
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gceHARDWARE_FUNCTION;
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typedef struct _gcsHARWARE_FUNCTION
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{
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/* Entry of the function. */
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gctUINT32 address;
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/* CPU address of the function. */
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gctUINT8_PTR logical;
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/* Bytes of the function. */
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gctUINT32 bytes;
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/* Hardware address of END in this function. */
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gctUINT32 endAddress;
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/* Logical of END in this function. */
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gctUINT8_PTR endLogical;
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}
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gcsHARDWARE_FUNCTION;
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typedef struct _gcsSTATETIMER
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{
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gctUINT64 start;
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gctUINT64 recent;
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/* Elapse of each power state. */
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gctUINT64 elapse[4];
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}
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gcsSTATETIMER;
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typedef struct _gcsHARDWARE_SIGNATURE
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{
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/* Chip model. */
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gceCHIPMODEL chipModel;
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/* Revision value.*/
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gctUINT32 chipRevision;
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/* Supported feature fields. */
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gctUINT32 chipFeatures;
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/* Supported minor feature fields. */
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gctUINT32 chipMinorFeatures;
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/* Supported minor feature 1 fields. */
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gctUINT32 chipMinorFeatures1;
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/* Supported minor feature 2 fields. */
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gctUINT32 chipMinorFeatures2;
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}
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gcsHARDWARE_SIGNATURE;
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typedef struct _gcsMMU_TABLE_ARRAY_ENTRY
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{
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gctUINT32 low;
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gctUINT32 high;
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}
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gcsMMU_TABLE_ARRAY_ENTRY;
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typedef struct _gcsHARDWARE_PAGETABLE_ARRAY
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{
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/* Number of entries in page table array. */
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gctUINT num;
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/* Size in bytes of array. */
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gctSIZE_T size;
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/* Physical address of array. */
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gctPHYS_ADDR_T address;
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/* Memory descriptor. */
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gctPHYS_ADDR physical;
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/* Logical address of array. */
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gctPOINTER logical;
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}
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gcsHARDWARE_PAGETABLE_ARRAY;
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/* gckHARDWARE object. */
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struct _gckHARDWARE
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{
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/* Object. */
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gcsOBJECT object;
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/* Pointer to gctKERNEL object. */
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gckKERNEL kernel;
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/* Pointer to gctOS object. */
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gckOS os;
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/* Core */
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gceCORE core;
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/* Chip characteristics. */
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gcsHAL_QUERY_CHIP_IDENTITY identity;
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gcsHAL_QUERY_CHIP_OPTIONS options;
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gctUINT32 powerBaseAddress;
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gctBOOL extraEventStates;
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/* Big endian */
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gctBOOL bigEndian;
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/* Base address. */
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gctUINT32 baseAddress;
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/* Chip status */
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gctPOINTER powerMutex;
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gctUINT32 powerProcess;
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gctUINT32 powerThread;
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gceCHIPPOWERSTATE chipPowerState;
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gctUINT32 lastWaitLink;
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gctUINT32 lastEnd;
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gctBOOL clockState;
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gctBOOL powerState;
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gctPOINTER globalSemaphore;
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gctUINT32 mmuVersion;
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/* Type */
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gceHARDWARE_TYPE type;
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#if gcdPOWEROFF_TIMEOUT
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gctUINT32 powerOffTime;
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gctUINT32 powerOffTimeout;
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gctPOINTER powerOffTimer;
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#endif
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#if gcdENABLE_FSCALE_VAL_ADJUST
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gctUINT32 powerOnFscaleVal;
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#endif
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gctPOINTER pageTableDirty[gcvENGINE_GPU_ENGINE_COUNT];
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#if gcdLINK_QUEUE_SIZE
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struct _gckQUEUE linkQueue;
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#endif
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gctBOOL stallFEPrefetch;
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gctUINT32 minFscaleValue;
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gctUINT waitCount;
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gctUINT32 mcClk;
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gctUINT32 shClk;
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gctPOINTER pendingEvent;
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/* Function used by gckHARDWARE. */
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gctPHYS_ADDR mmuFuncPhysical;
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gctPOINTER mmuFuncLogical;
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gctSIZE_T mmuFuncBytes;
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gctPHYS_ADDR auxFuncPhysical;
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gctPHYS_ADDR auxPhysHandle;
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gctPOINTER auxFuncLogical;
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gctUINT32 auxFuncAddress;
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gctSIZE_T auxFuncBytes;
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gcsHARDWARE_FUNCTION functions[gcvHARDWARE_FUNCTION_NUM];
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gcsSTATETIMER powerStateTimer;
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gctUINT32 executeCount;
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gctUINT32 lastExecuteAddress;
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/* Head for hardware list in gckMMU. */
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gcsLISTHEAD mmuHead;
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gctPOINTER featureDatabase;
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gctBOOL hasAsyncFe;
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gctBOOL hasL2Cache;
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gcsHARDWARE_SIGNATURE signature;
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gctUINT32 maxOutstandingReads;
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gcsHARDWARE_PAGETABLE_ARRAY pagetableArray;
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gctUINT64 contextID;
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};
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typedef struct _gcsFEDescriptor
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{
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gctUINT32 start;
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gctUINT32 end;
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}
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gcsFEDescriptor;
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typedef struct _gcsFE * gckFE;
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typedef struct _gcsFE
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{
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gckOS os;
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/* Number of free descriptors. */
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gctPOINTER freeDscriptors;
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}
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gcsFE;
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gceSTATUS
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gckFE_Initialize(
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IN gckHARDWARE Hardware,
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OUT gckFE FE
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);
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gceSTATUS
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gckFE_ReserveSlot(
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IN gckHARDWARE Hardware,
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IN gckFE FE,
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OUT gctBOOL * Available
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);
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void
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gckFE_UpdateAvaiable(
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IN gckHARDWARE Hardware,
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OUT gckFE FE
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);
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void
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gckFE_Execute(
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IN gckHARDWARE Hardware,
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IN gckFE FE,
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IN gcsFEDescriptor * Desc
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);
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gceSTATUS
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gckHARDWARE_GetBaseAddress(
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IN gckHARDWARE Hardware,
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OUT gctUINT32_PTR BaseAddress
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);
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gceSTATUS
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gckHARDWARE_NeedBaseAddress(
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IN gckHARDWARE Hardware,
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IN gctUINT32 State,
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OUT gctBOOL_PTR NeedBase
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);
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gceSTATUS
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gckHARDWARE_GetFrameInfo(
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IN gckHARDWARE Hardware,
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OUT gcsHAL_FRAME_INFO * FrameInfo
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);
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gceSTATUS
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gckHARDWARE_DumpGpuProfile(
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IN gckHARDWARE Hardware
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);
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gceSTATUS
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gckHARDWARE_HandleFault(
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IN gckHARDWARE Hardware
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);
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gceSTATUS
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gckHARDWARE_ExecuteFunctions(
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IN gckHARDWARE Hardware,
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IN gceHARDWARE_FUNCTION Function
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);
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gceSTATUS
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gckHARDWARE_DummyDraw(
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IN gckHARDWARE Hardware,
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IN gctPOINTER Logical,
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IN gctUINT32 Address,
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IN gceDUMMY_DRAW_TYPE DummyDrawType,
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IN OUT gctUINT32 * Bytes
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);
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gceSTATUS
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gckHARDWARE_EnterQueryClock(
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IN gckHARDWARE Hardware,
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OUT gctUINT64 *McStart,
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OUT gctUINT64 *ShStart
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);
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gceSTATUS
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gckHARDWARE_ExitQueryClock(
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IN gckHARDWARE Hardware,
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IN gctUINT64 McStart,
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IN gctUINT64 ShStart,
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OUT gctUINT32 *McClk,
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OUT gctUINT32 *ShClk
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);
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gceSTATUS
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gckHARDWARE_QueryFrequency(
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IN gckHARDWARE Hardware
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);
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#define gcmkWRITE_MEMORY(logical, data) \
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do { \
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gcmkVERIFY_OK(gckOS_WriteMemory(os, logical, data)); \
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logical++; \
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}\
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while (0) ; \
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#ifdef __cplusplus
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}
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#endif
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#endif /* __gc_hal_kernel_hardware_h_ */
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