3a167beac0
This patch add a new callback kvmppc_ops. This will help us in enabling both HV and PR KVM together in the same kernel. The actual change to enable them together is done in the later patch in the series. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> [agraf: squash in booke changes] Signed-off-by: Alexander Graf <agraf@suse.de>
406 lines
10 KiB
C
406 lines
10 KiB
C
/*
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* Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm_host.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu-hash32.h>
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#include <asm/machdep.h>
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#include <asm/mmu_context.h>
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#include <asm/hw_irq.h>
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/* #define DEBUG_MMU */
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/* #define DEBUG_SR */
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#ifdef DEBUG_MMU
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#define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
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#else
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#define dprintk_mmu(a, ...) do { } while(0)
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#endif
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#ifdef DEBUG_SR
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#define dprintk_sr(a, ...) printk(KERN_INFO a, __VA_ARGS__)
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#else
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#define dprintk_sr(a, ...) do { } while(0)
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#endif
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#if PAGE_SHIFT != 12
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#error Unknown page size
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#endif
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#ifdef CONFIG_SMP
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#error XXX need to grab mmu_hash_lock
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#endif
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#ifdef CONFIG_PTE_64BIT
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#error Only 32 bit pages are supported for now
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#endif
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static ulong htab;
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static u32 htabmask;
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void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
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{
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volatile u32 *pteg;
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/* Remove from host HTAB */
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pteg = (u32*)pte->slot;
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pteg[0] = 0;
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/* And make sure it's gone from the TLB too */
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asm volatile ("sync");
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asm volatile ("tlbie %0" : : "r" (pte->pte.eaddr) : "memory");
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asm volatile ("sync");
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asm volatile ("tlbsync");
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}
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/* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
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* a hash, so we don't waste cycles on looping */
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static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
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}
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static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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struct kvmppc_sid_map *map;
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u16 sid_map_mask;
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if (vcpu->arch.shared->msr & MSR_PR)
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gvsid |= VSID_PR;
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sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
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map = &to_book3s(vcpu)->sid_map[sid_map_mask];
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if (map->guest_vsid == gvsid) {
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dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n",
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gvsid, map->host_vsid);
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return map;
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}
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map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
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if (map->guest_vsid == gvsid) {
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dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n",
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gvsid, map->host_vsid);
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return map;
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}
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dprintk_sr("SR: Searching 0x%llx -> not found\n", gvsid);
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return NULL;
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}
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static u32 *kvmppc_mmu_get_pteg(struct kvm_vcpu *vcpu, u32 vsid, u32 eaddr,
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bool primary)
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{
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u32 page, hash;
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ulong pteg = htab;
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page = (eaddr & ~ESID_MASK) >> 12;
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hash = ((vsid ^ page) << 6);
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if (!primary)
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hash = ~hash;
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hash &= htabmask;
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pteg |= hash;
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dprintk_mmu("htab: %lx | hash: %x | htabmask: %x | pteg: %lx\n",
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htab, hash, htabmask, pteg);
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return (u32*)pteg;
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}
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extern char etext[];
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int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,
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bool iswrite)
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{
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pfn_t hpaddr;
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u64 vpn;
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u64 vsid;
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struct kvmppc_sid_map *map;
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volatile u32 *pteg;
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u32 eaddr = orig_pte->eaddr;
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u32 pteg0, pteg1;
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register int rr = 0;
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bool primary = false;
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bool evict = false;
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struct hpte_cache *pte;
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int r = 0;
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bool writable;
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/* Get host physical address for gpa */
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hpaddr = kvmppc_gfn_to_pfn(vcpu, orig_pte->raddr >> PAGE_SHIFT,
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iswrite, &writable);
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if (is_error_noslot_pfn(hpaddr)) {
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printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n",
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orig_pte->eaddr);
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r = -EINVAL;
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goto out;
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}
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hpaddr <<= PAGE_SHIFT;
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/* and write the mapping ea -> hpa into the pt */
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vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
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map = find_sid_vsid(vcpu, vsid);
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if (!map) {
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kvmppc_mmu_map_segment(vcpu, eaddr);
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map = find_sid_vsid(vcpu, vsid);
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}
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BUG_ON(!map);
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vsid = map->host_vsid;
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vpn = (vsid << (SID_SHIFT - VPN_SHIFT)) |
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((eaddr & ~ESID_MASK) >> VPN_SHIFT);
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next_pteg:
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if (rr == 16) {
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primary = !primary;
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evict = true;
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rr = 0;
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}
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pteg = kvmppc_mmu_get_pteg(vcpu, vsid, eaddr, primary);
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/* not evicting yet */
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if (!evict && (pteg[rr] & PTE_V)) {
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rr += 2;
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goto next_pteg;
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}
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dprintk_mmu("KVM: old PTEG: %p (%d)\n", pteg, rr);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]);
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pteg0 = ((eaddr & 0x0fffffff) >> 22) | (vsid << 7) | PTE_V |
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(primary ? 0 : PTE_SEC);
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pteg1 = hpaddr | PTE_M | PTE_R | PTE_C;
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if (orig_pte->may_write && writable) {
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pteg1 |= PP_RWRW;
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mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
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} else {
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pteg1 |= PP_RWRX;
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}
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if (orig_pte->may_execute)
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kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
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local_irq_disable();
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if (pteg[rr]) {
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pteg[rr] = 0;
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asm volatile ("sync");
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}
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pteg[rr + 1] = pteg1;
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pteg[rr] = pteg0;
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asm volatile ("sync");
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local_irq_enable();
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dprintk_mmu("KVM: new PTEG: %p\n", pteg);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]);
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dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]);
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/* Now tell our Shadow PTE code about the new page */
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pte = kvmppc_mmu_hpte_cache_next(vcpu);
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dprintk_mmu("KVM: %c%c Map 0x%llx: [%lx] 0x%llx (0x%llx) -> %lx\n",
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orig_pte->may_write ? 'w' : '-',
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orig_pte->may_execute ? 'x' : '-',
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orig_pte->eaddr, (ulong)pteg, vpn,
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orig_pte->vpage, hpaddr);
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pte->slot = (ulong)&pteg[rr];
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pte->host_vpn = vpn;
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pte->pte = *orig_pte;
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pte->pfn = hpaddr >> PAGE_SHIFT;
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kvmppc_mmu_hpte_cache_map(vcpu, pte);
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kvm_release_pfn_clean(hpaddr >> PAGE_SHIFT);
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out:
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return r;
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}
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void kvmppc_mmu_unmap_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
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{
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kvmppc_mmu_pte_vflush(vcpu, pte->vpage, 0xfffffffffULL);
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}
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static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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struct kvmppc_sid_map *map;
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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u16 sid_map_mask;
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static int backwards_map = 0;
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if (vcpu->arch.shared->msr & MSR_PR)
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gvsid |= VSID_PR;
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/* We might get collisions that trap in preceding order, so let's
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map them differently */
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sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
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if (backwards_map)
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sid_map_mask = SID_MAP_MASK - sid_map_mask;
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map = &to_book3s(vcpu)->sid_map[sid_map_mask];
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/* Make sure we're taking the other map next time */
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backwards_map = !backwards_map;
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/* Uh-oh ... out of mappings. Let's flush! */
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if (vcpu_book3s->vsid_next >= VSID_POOL_SIZE) {
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vcpu_book3s->vsid_next = 0;
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memset(vcpu_book3s->sid_map, 0,
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sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
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kvmppc_mmu_pte_flush(vcpu, 0, 0);
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kvmppc_mmu_flush_segments(vcpu);
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}
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map->host_vsid = vcpu_book3s->vsid_pool[vcpu_book3s->vsid_next];
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vcpu_book3s->vsid_next++;
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map->guest_vsid = gvsid;
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map->valid = true;
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return map;
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}
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int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
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{
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u32 esid = eaddr >> SID_SHIFT;
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u64 gvsid;
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u32 sr;
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struct kvmppc_sid_map *map;
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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int r = 0;
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if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
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/* Invalidate an entry */
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svcpu->sr[esid] = SR_INVALID;
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r = -ENOENT;
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goto out;
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}
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map = find_sid_vsid(vcpu, gvsid);
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if (!map)
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map = create_sid_map(vcpu, gvsid);
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map->guest_esid = esid;
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sr = map->host_vsid | SR_KP;
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svcpu->sr[esid] = sr;
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dprintk_sr("MMU: mtsr %d, 0x%x\n", esid, sr);
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out:
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svcpu_put(svcpu);
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return r;
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}
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void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
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{
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int i;
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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dprintk_sr("MMU: flushing all segments (%d)\n", ARRAY_SIZE(svcpu->sr));
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for (i = 0; i < ARRAY_SIZE(svcpu->sr); i++)
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svcpu->sr[i] = SR_INVALID;
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svcpu_put(svcpu);
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}
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void kvmppc_mmu_destroy_pr(struct kvm_vcpu *vcpu)
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{
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int i;
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kvmppc_mmu_hpte_destroy(vcpu);
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preempt_disable();
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for (i = 0; i < SID_CONTEXTS; i++)
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__destroy_context(to_book3s(vcpu)->context_id[i]);
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preempt_enable();
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}
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/* From mm/mmu_context_hash32.c */
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#define CTX_TO_VSID(c, id) ((((c) * (897 * 16)) + (id * 0x111)) & 0xffffff)
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int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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int err;
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ulong sdr1;
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int i;
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int j;
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for (i = 0; i < SID_CONTEXTS; i++) {
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err = __init_new_context();
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if (err < 0)
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goto init_fail;
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vcpu3s->context_id[i] = err;
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/* Remember context id for this combination */
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for (j = 0; j < 16; j++)
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vcpu3s->vsid_pool[(i * 16) + j] = CTX_TO_VSID(err, j);
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}
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vcpu3s->vsid_next = 0;
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/* Remember where the HTAB is */
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asm ( "mfsdr1 %0" : "=r"(sdr1) );
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htabmask = ((sdr1 & 0x1FF) << 16) | 0xFFC0;
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htab = (ulong)__va(sdr1 & 0xffff0000);
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kvmppc_mmu_hpte_init(vcpu);
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return 0;
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init_fail:
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for (j = 0; j < i; j++) {
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if (!vcpu3s->context_id[j])
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continue;
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__destroy_context(to_book3s(vcpu)->context_id[j]);
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}
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return -1;
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}
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