b82b6cca48
The only place where the time is invalid is when the ACPI_CSTATE_FFH entry method is not set. Otherwise for all the drivers, the time can be correctly measured. Instead of duplicating the CPUIDLE_FLAG_TIME_VALID flag in all the drivers for all the states, just invert the logic by replacing it by the flag CPUIDLE_FLAG_TIME_INVALID, hence we can set this flag only for the acpi idle driver, remove the former flag from all the drivers and invert the logic with this flag in the different governor. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
149 lines
3.3 KiB
C
149 lines
3.3 KiB
C
/*
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* CPU idle driver for Tegra CPUs
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*
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* Copyright (c) 2010-2012, NVIDIA Corporation.
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* Copyright (c) 2011 Google, Inc.
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* Author: Colin Cross <ccross@android.com>
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* Gary King <gking@nvidia.com>
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*
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* Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/clk/tegra.h>
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#include <linux/clockchips.h>
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#include <linux/cpuidle.h>
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#include <linux/cpu_pm.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/cpuidle.h>
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#include <asm/proc-fns.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include "pm.h"
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#include "sleep.h"
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#ifdef CONFIG_PM_SLEEP
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static int tegra30_idle_lp2(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index);
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#endif
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static struct cpuidle_driver tegra_idle_driver = {
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.name = "tegra_idle",
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.owner = THIS_MODULE,
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#ifdef CONFIG_PM_SLEEP
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.state_count = 2,
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#else
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.state_count = 1,
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#endif
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.states = {
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[0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
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#ifdef CONFIG_PM_SLEEP
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[1] = {
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.enter = tegra30_idle_lp2,
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.exit_latency = 2000,
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.target_residency = 2200,
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.power_usage = 0,
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.name = "powered-down",
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.desc = "CPU power gated",
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},
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#endif
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},
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};
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#ifdef CONFIG_PM_SLEEP
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static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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/* All CPUs entering LP2 is not working.
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* Don't let CPU0 enter LP2 when any secondary CPU is online.
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*/
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if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) {
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cpu_do_idle();
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return false;
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}
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
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tegra_idle_lp2_last();
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
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return true;
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}
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#ifdef CONFIG_SMP
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static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
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smp_wmb();
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cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
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return true;
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}
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#else
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static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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return true;
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}
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#endif
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static int tegra30_idle_lp2(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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bool entered_lp2 = false;
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bool last_cpu;
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local_fiq_disable();
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last_cpu = tegra_set_cpu_in_lp2();
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cpu_pm_enter();
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if (dev->cpu == 0) {
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if (last_cpu)
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entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv,
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index);
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else
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cpu_do_idle();
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} else {
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entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);
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}
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cpu_pm_exit();
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tegra_clear_cpu_in_lp2();
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local_fiq_enable();
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smp_rmb();
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return (entered_lp2) ? index : 0;
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}
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#endif
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int __init tegra30_cpuidle_init(void)
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{
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return cpuidle_register(&tegra_idle_driver, NULL);
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}
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