![Yoshihiro Shimoda](/assets/img/avatar_default.png)
This patch sets resume_quirk() for R-Car controllers to re-download the firmware in resume timing. Otherwise, if the controller's power is down in suspend timing, the firmware in the controller goes away, and then the controller doesn't work after resume. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
212 lines
6 KiB
C
212 lines
6 KiB
C
/*
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* xHCI host controller driver for R-Car SoCs
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*/
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/usb/phy.h>
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#include "xhci.h"
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#include "xhci-plat.h"
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#include "xhci-rcar.h"
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/*
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* - The V3 firmware is for r8a7796 (with good performance).
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* - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
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* - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
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* performance degradation. So, this driver continues to use the V1 if R-Car
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* Gen2.
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* - The V1 firmware is impossible to use on R-Car Gen3.
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*/
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MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
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MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
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MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
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/*** Register Offset ***/
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#define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */
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#define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */
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#define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */
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#define RCAR_USB3_LCLK 0xa44 /* LCLK Select */
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#define RCAR_USB3_CONF1 0xa48 /* USB3.0 Configuration1 */
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#define RCAR_USB3_CONF2 0xa5c /* USB3.0 Configuration2 */
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#define RCAR_USB3_CONF3 0xaa8 /* USB3.0 Configuration3 */
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#define RCAR_USB3_RX_POL 0xab0 /* USB3.0 RX Polarity */
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#define RCAR_USB3_TX_POL 0xab8 /* USB3.0 TX Polarity */
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/*** Register Settings ***/
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/* Interrupt Enable */
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#define RCAR_USB3_INT_XHC_ENA 0x00000001
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#define RCAR_USB3_INT_PME_ENA 0x00000002
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#define RCAR_USB3_INT_HSE_ENA 0x00000004
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#define RCAR_USB3_INT_ENA_VAL (RCAR_USB3_INT_XHC_ENA | \
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RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
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/* FW Download Control & Status */
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#define RCAR_USB3_DL_CTRL_ENABLE 0x00000001
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#define RCAR_USB3_DL_CTRL_FW_SUCCESS 0x00000010
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#define RCAR_USB3_DL_CTRL_FW_SET_DATA0 0x00000100
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/* LCLK Select */
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#define RCAR_USB3_LCLK_ENA_VAL 0x01030001
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/* USB3.0 Configuration */
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#define RCAR_USB3_CONF1_VAL 0x00030204
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#define RCAR_USB3_CONF2_VAL 0x00030300
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#define RCAR_USB3_CONF3_VAL 0x13802007
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/* USB3.0 Polarity */
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#define RCAR_USB3_RX_POL_VAL BIT(21)
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#define RCAR_USB3_TX_POL_VAL BIT(4)
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static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
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{
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/* LCLK Select */
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writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
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/* USB3.0 Configuration */
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writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
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writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
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writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
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/* USB3.0 Polarity */
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writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
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writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
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}
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static int xhci_rcar_is_gen2(struct device *dev)
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{
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struct device_node *node = dev->of_node;
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return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
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of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
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of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
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of_device_is_compatible(node, "renensas,rcar-gen2-xhci");
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}
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static int xhci_rcar_is_gen3(struct device *dev)
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{
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struct device_node *node = dev->of_node;
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return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
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of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
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of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
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}
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void xhci_rcar_start(struct usb_hcd *hcd)
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{
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u32 temp;
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if (hcd->regs != NULL) {
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/* Interrupt Enable */
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temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
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temp |= RCAR_USB3_INT_ENA_VAL;
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writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
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if (xhci_rcar_is_gen2(hcd->self.controller))
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xhci_rcar_start_gen2(hcd);
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}
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}
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static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
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{
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struct device *dev = hcd->self.controller;
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void __iomem *regs = hcd->regs;
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struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
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const struct firmware *fw;
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int retval, index, j, time;
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int timeout = 10000;
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u32 data, val, temp;
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/* request R-Car USB3.0 firmware */
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retval = request_firmware(&fw, priv->firmware_name, dev);
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if (retval)
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return retval;
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/* download R-Car USB3.0 firmware */
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temp = readl(regs + RCAR_USB3_DL_CTRL);
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temp |= RCAR_USB3_DL_CTRL_ENABLE;
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writel(temp, regs + RCAR_USB3_DL_CTRL);
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for (index = 0; index < fw->size; index += 4) {
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/* to avoid reading beyond the end of the buffer */
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for (data = 0, j = 3; j >= 0; j--) {
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if ((j + index) < fw->size)
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data |= fw->data[index + j] << (8 * j);
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}
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writel(data, regs + RCAR_USB3_FW_DATA0);
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temp = readl(regs + RCAR_USB3_DL_CTRL);
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temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
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writel(temp, regs + RCAR_USB3_DL_CTRL);
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for (time = 0; time < timeout; time++) {
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val = readl(regs + RCAR_USB3_DL_CTRL);
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if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
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break;
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udelay(1);
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}
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if (time == timeout) {
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retval = -ETIMEDOUT;
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break;
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}
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}
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temp = readl(regs + RCAR_USB3_DL_CTRL);
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temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
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writel(temp, regs + RCAR_USB3_DL_CTRL);
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for (time = 0; time < timeout; time++) {
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val = readl(regs + RCAR_USB3_DL_CTRL);
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if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
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retval = 0;
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break;
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}
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udelay(1);
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}
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if (time == timeout)
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retval = -ETIMEDOUT;
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release_firmware(fw);
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return retval;
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}
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/* This function needs to initialize a "phy" of usb before */
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int xhci_rcar_init_quirk(struct usb_hcd *hcd)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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/* If hcd->regs is NULL, we don't just call the following function */
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if (!hcd->regs)
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return 0;
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/*
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* On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
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* to 1. However, these SoCs don't support 64-bit address memory
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* pointers. So, this driver clears the AC64 bit of xhci->hcc_params
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* to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
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* xhci_gen_setup().
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*/
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if (xhci_rcar_is_gen2(hcd->self.controller) ||
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xhci_rcar_is_gen3(hcd->self.controller))
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xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
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return xhci_rcar_download_firmware(hcd);
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}
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int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
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{
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int ret;
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ret = xhci_rcar_download_firmware(hcd);
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if (!ret)
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xhci_rcar_start(hcd);
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return ret;
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}
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