54 lines
1.8 KiB
Plaintext
54 lines
1.8 KiB
Plaintext
Freescale Asynchronous Sample Rate Converter (ASRC) Controller
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The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
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signal associated with an input clock into a signal associated with a different
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output clock. The driver currently works as a Front End of DPCM with other Back
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Ends Audio controller such as ESAI, SSI and SAI. It has four context to support
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four substreams within totally 32 channels.
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Required properties:
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- compatible : Contains "fsl,imx8mn-easrc".
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- reg : Offset and length of the register set for the device.
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- interrupts : Contains the asrc interrupt.
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- dmas : Generic dma devicetree binding as described in
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Documentation/devicetree/bindings/dma/dma.txt.
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- dma-names : Contains "ctx0_rx", "ctx0_tx", "ctx1_rx", "ctx1_tx",
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"ctx2_rx", "ctx2_tx", "ctx3_rx", "ctx3_tx".
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- clocks : Contains an entry for each entry in clock-names.
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- clock-names : Contains the following entries
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"mem" Peripheral clock to driver module.
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- fsl,easrc-ram-script-name : The coefficient table for the filters
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- fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends.
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- fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends.
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Example:
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easrc: easrc@300C0000 {
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compatible = "fsl,imx8mn-easrc";
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reg = <0x0 0x300C0000 0x0 0x10000>;
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interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
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clock-names = "mem";
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dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
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<&sdma2 18 23 0> , <&sdma2 19 23 0>,
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<&sdma2 20 23 0> , <&sdma2 21 23 0>,
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<&sdma2 22 23 0> , <&sdma2 23 23 0>;
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dma-names = "ctx0_rx", "ctx0_tx",
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"ctx1_rx", "ctx1_tx",
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"ctx2_rx", "ctx2_tx",
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"ctx3_rx", "ctx3_tx";
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fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
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fsl,asrc-rate = <8000>;
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fsl,asrc-width = <16>;
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status = "disabled";
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};
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