alistair23-linux/arch/csky/mm
Guo Ren 33e53ae1ce csky: Add kprobes supported
This patch enable kprobes, kretprobes, ftrace interface. It utilized
software breakpoint and single step debug exceptions, instructions
simulation on csky.

We use USR_BKPT replace origin instruction, and the kprobe handler
prepares an excutable memory slot for out-of-line execution with a
copy of the original instruction being probed. Most of instructions
could be executed by single-step, but some instructions need origin
pc value to execute and we need software simulate these instructions.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Steven Rostedt (VMware) <rostedt@goodmis.org>
2020-04-03 11:14:17 +08:00
..
asid.c csky: Add new asid lib code from arm 2019-07-19 14:21:36 +08:00
cachev1.c csky: Support icache flush without specific instructions 2020-02-21 15:43:24 +08:00
cachev2.c csky/ftrace: Fixup ftrace_modify_code deadlock without CPU_HAS_ICACHE_INS 2020-03-31 22:15:42 +08:00
context.c csky: Use generic asid algorithm to implement switch_mm 2019-07-19 14:21:36 +08:00
dma-mapping.c dma-mapping: drop the dev argument to arch_sync_dma_for_* 2019-11-20 20:31:38 +01:00
fault.c csky: Add kprobes supported 2020-04-03 11:14:17 +08:00
highmem.c csky: Separate fixaddr_init from highmem 2020-02-21 15:43:24 +08:00
init.c csky: Add setup_initrd check code 2020-02-21 15:43:25 +08:00
ioremap.c csky: use generic ioremap 2019-11-12 11:37:52 +01:00
Makefile csky: Fixup ftrace modify panic 2020-02-21 15:43:24 +08:00
syscache.c csky: Add flush_icache_mm to defer flush icache all 2020-02-21 15:43:24 +08:00
tcm.c csky: Tightly-Coupled Memory or Sram support 2020-02-21 15:43:24 +08:00
tlb.c csky: Improve tlb operation with help of asid 2019-07-19 14:21:36 +08:00