1
0
Fork 0
alistair23-linux/drivers/clk/ti
Linus Torvalds 8653b778e4 The core framework got some nice improvements this time around. We gained the
ability to get struct clk pointers from a struct clk_hw so that clk providers
 can consume the clks they provide, if they need to do something like that. This
 has been a long missing part of the clk provider API that will help us move
 away from exposing a struct clk pointer in the struct clk_hw. Tracepoints are
 added for the clk_set_rate() "range" functions, similar to the tracepoints we
 already have for clk_set_rate() and we added a column to debugfs to help
 developers understand the hardware enable state of clks in case firmware or
 bootloader state is different than what is expected. Overall the core changes
 are mostly improving the clk driver writing experience.
 
 At the driver level, we have the usual collection of driver updates and new
 drivers for new SoCs. This time around the Qualcomm folks introduced a good
 handful of clk drivers for various parts of three or four SoCs. The SiFive
 folks added a new clk driver for their FU740 SoCs, coming in second on the
 diffstat and then Atmel AT91 and Amlogic SoCs had lots of work done after that
 for various new features. One last thing to note in the driver area is that the
 i.MX driver has gained a new binding to support SCU clks after being on the
 list for many months. It uses a two cell binding which is sort of rare in clk
 DT bindings. Beyond that we have the usual set of driver fixes and tweaks that
 come from more testing and finding out that some configuration was wrong or
 that a driver could support being built as a module.
 
 Core:
  - Add some trace points for clk_set_rate() "range" functions
  - Add hardware enable information to clk_summary debugfs
  - Replace clk-provider.h with of_clk.h when possible
  - Add devm variant of clk_notifier_register()
  - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw
 
 New Drivers:
  - Bindings for Canaan K210 SoC clks
  - Support for SiFive FU740 PRCI
  - Camera clks on Qualcomm SC7180 SoCs
  - GCC and RPMh clks on Qualcomm SDX55 SoCs
  - RPMh clks on Qualcomm SM8350 SoCs
  - LPASS clks on Qualcomm SM8250 SoCs
 
 Updates:
  - DVFS support for AT91 clk driver
  - Update git repo branch for Renesas clock drivers
  - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U
  - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E
  - Stop using __raw_*() I/O accessors in Renesas clk drivers
  - One more conversion of DT bindings to json-schema
  - Make i.MX clk-gate2 driver more flexible
  - New two cell binding for i.MX SCU clks
  - Drop of_match_ptr() in i.MX8 clk drivers
  - Add arch dependencies for Rockchip clk drivers
  - Fix i2s on Rockchip rk3066
  - Add MIPI DSI clks on Amlogic axg and g12 SoCs
  - Support modular builds of Amlogic clk drivers
  - Fix an Amlogic Video PLL clock dependency
  - Samsung Kconfig dependencies updates for better compile test coverage
  - Refactoring of the Samsung PLL clocks driver
  - Small Tegra driver cleanups
  - Minor fixes to Ingenic and VC5 clk drivers
  - Cleanup patches to remove unused variables and plug memory leaks
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl/f/ycRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXjxg/7BJMFphpZmQb3iy/lZMYfgPh2yxZvrrBj
 zJ2i1mMru/C3BkXTx29HCJvj6/VC2HgGLL6fzfwe7oY3XVRT1Vxlsvka9vNZSNc2
 UYNa8GUwR0mSXDzp5KnzoAQfLwvSqWUIeT8WB+Z+CJ7WIAGWnXgBlqsf/d/mr9hg
 JoAh+ROpbksL6hs61WJSm+7/Yu6efS0Yj0zzLZOINFWvDIOJ+Rp4g1u+qGH9tZyO
 I2Bik75Sc8hqvLUP5SVzI/1H4yLB0On+ADgVRwjvrKPVX56alYquOUMsU+sy4SeY
 ONQBki3vV5gtJHG1qvkwTC5/Yw20eUsrmrc7PNECvb1zo5Tp4QuOAR5nHCb4fg8u
 n7RRd1MktTAUAQxTzBaNYtix3Q19fjSR44C/1B6lKk6xkN+w4uYLi2GHrADy9rXa
 SwQVTKTGc8LjGywDaAOXdAyx2FMAtt1OvkTxZ238+aoHw5nQDHWKxu5TwYK6b5jG
 aEFzTCIEYlzRLqcZyGONSD0WXmQWyoNiPwJ3B7RDRfpg7dPESyKIB4MzGWiX9eDy
 lri/SoVH08c1sRf8AzIoi+CUNi8geTNAHHlJfiGznrv81ttVf3FioWyWLjr+SmBV
 rNxn35WxeDWoCZqtrLJlg5skVgmD8BRXLZTI9udPG8u6D7OdWdJBuMZ6EelO+OZg
 /n4w8tdo3cE=
 =Wt9O
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The core framework got some nice improvements this time around. We
  gained the ability to get struct clk pointers from a struct clk_hw so
  that clk providers can consume the clks they provide, if they need to
  do something like that. This has been a long missing part of the clk
  provider API that will help us move away from exposing a struct clk
  pointer in the struct clk_hw. Tracepoints are added for the
  clk_set_rate() "range" functions, similar to the tracepoints we
  already have for clk_set_rate() and we added a column to debugfs to
  help developers understand the hardware enable state of clks in case
  firmware or bootloader state is different than what is expected.
  Overall the core changes are mostly improving the clk driver writing
  experience.

  At the driver level, we have the usual collection of driver updates
  and new drivers for new SoCs. This time around the Qualcomm folks
  introduced a good handful of clk drivers for various parts of three or
  four SoCs. The SiFive folks added a new clk driver for their FU740
  SoCs, coming in second on the diffstat and then Atmel AT91 and Amlogic
  SoCs had lots of work done after that for various new features. One
  last thing to note in the driver area is that the i.MX driver has
  gained a new binding to support SCU clks after being on the list for
  many months. It uses a two cell binding which is sort of rare in clk
  DT bindings. Beyond that we have the usual set of driver fixes and
  tweaks that come from more testing and finding out that some
  configuration was wrong or that a driver could support being built as
  a module.

  Summary:

  Core:
   - Add some trace points for clk_set_rate() "range" functions
   - Add hardware enable information to clk_summary debugfs
   - Replace clk-provider.h with of_clk.h when possible
   - Add devm variant of clk_notifier_register()
   - Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw

  New Drivers:
   - Bindings for Canaan K210 SoC clks
   - Support for SiFive FU740 PRCI
   - Camera clks on Qualcomm SC7180 SoCs
   - GCC and RPMh clks on Qualcomm SDX55 SoCs
   - RPMh clks on Qualcomm SM8350 SoCs
   - LPASS clks on Qualcomm SM8250 SoCs

  Updates:
   - DVFS support for AT91 clk driver
   - Update git repo branch for Renesas clock drivers
   - Add camera (CSI) and video-in (VIN) clocks on Renesas R-Car V3U
   - Add RPC (QSPI/HyperFLASH) clocks on Renesas RZ/G2M, RZ/G2N, and RZ/G2E
   - Stop using __raw_*() I/O accessors in Renesas clk drivers
   - One more conversion of DT bindings to json-schema
   - Make i.MX clk-gate2 driver more flexible
   - New two cell binding for i.MX SCU clks
   - Drop of_match_ptr() in i.MX8 clk drivers
   - Add arch dependencies for Rockchip clk drivers
   - Fix i2s on Rockchip rk3066
   - Add MIPI DSI clks on Amlogic axg and g12 SoCs
   - Support modular builds of Amlogic clk drivers
   - Fix an Amlogic Video PLL clock dependency
   - Samsung Kconfig dependencies updates for better compile test coverage
   - Refactoring of the Samsung PLL clocks driver
   - Small Tegra driver cleanups
   - Minor fixes to Ingenic and VC5 clk drivers
   - Cleanup patches to remove unused variables and plug memory leaks"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (134 commits)
  dt-binding: clock: Document canaan,k210-clk bindings
  dt-bindings: Add Canaan vendor prefix
  clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts"
  clk: ingenic: Fix divider calculation with div tables
  clk: sunxi-ng: Make sure divider tables have sentinel
  clk: s2mps11: Fix a resource leak in error handling paths in the probe function
  clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9
  clk: si5351: Wait for bit clear after PLL reset
  clk: at91: sam9x60: remove atmel,osc-bypass support
  clk: at91: sama7g5: register cpu clock
  clk: at91: clk-master: re-factor master clock
  clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz
  clk: at91: sama7g5: decrease lower limit for MCK0 rate
  clk: at91: sama7g5: remove mck0 from parent list of other clocks
  clk: at91: clk-sam9x60-pll: allow runtime changes for pll
  clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
  clk: at91: clk-master: add 5th divisor for mck master
  clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT
  dt-bindings: clock: at91: add sama7g5 pll defines
  clk: at91: sama7g5: fix compilation error
  ...
2020-12-21 10:39:37 -08:00
..
Kconfig treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile clk: ti: dra7xx: rename existing clkctrl data as compat data 2018-10-03 15:02:27 +03:00
adpll.c clk/ti/adpll: allocate room for terminating null 2019-11-08 09:00:37 -08:00
apll.c clk: ti: Don't reference clk_init_data after registration 2019-08-16 10:22:46 -07:00
autoidle.c clk: ti: autoidle: add checks against NULL pointer reference 2020-09-22 13:00:07 -07:00
clk-2xxx.c Merge branch 'cleanup-clk-h-includes' into clk-next 2015-07-28 11:59:09 -07:00
clk-3xxx.c clk: ti: omap3: cleanup unnecessary clock aliases 2017-12-01 15:17:17 +02:00
clk-7xx-compat.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-7xx.c clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks 2020-11-19 15:09:00 +02:00
clk-33xx-compat.c clk: ti: am33xx: rename existing clkctrl data as compat data 2018-10-03 15:02:26 +03:00
clk-33xx.c clk: ti: am33xx: Keep am3 l3 main clock always on for genpd 2020-11-16 12:57:29 +02:00
clk-43xx-compat.c clk: ti: am43xx: rename existing clkctrl data as compat data 2018-10-03 15:02:26 +03:00
clk-43xx.c clk: ti: am437x: Keep am4 l3 main clock always on for genpd 2020-11-16 13:00:20 +02:00
clk-44xx.c clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks 2020-11-19 14:21:27 +02:00
clk-54xx.c clk: ti: omap5: Fix reboot DPLL lock failure when using ABE TIMERs 2020-12-17 01:47:01 -08:00
clk-814x.c clk: ti: Fix dm814x clkctrl for ethernet 2020-03-17 09:45:24 -07:00
clk-816x.c clk: ti: dm816: enable sysclk6_ck on init 2020-05-19 09:38:03 -07:00
clk-dra7-atl.c clk: ti: dra7-atl: Remove pm_runtime_irq_safe() 2020-01-05 19:04:19 -08:00
clk.c clk: ti: clkctrl: Fix hidden dependency to node name 2020-01-20 12:29:27 +02:00
clkctrl.c clk: ti: clkctrl: convert subclocks to use proper names also 2020-05-12 20:18:19 -07:00
clkt_dflt.c clk: ti: convert to use proper register definition for all accesses 2017-03-08 13:06:15 +02:00
clkt_dpll.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clkt_iclk.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clock.h clk: let init callback return an error code 2019-12-23 18:53:13 -08:00
clockdomain.c clk: ti: clockdomain: fix static checker warning 2020-09-22 13:00:07 -07:00
composite.c clk: ti: composite: fix memory leak 2020-05-14 12:54:41 -07:00
divider.c clk: ti: divider: convert to use min,max,mask instead of width 2019-10-31 15:32:36 +02:00
dpll.c Merge branches 'clk-renesas', 'clk-rockchip', 'clk-const' and 'clk-simplify' into clk-next 2019-09-19 15:31:41 -07:00
dpll3xxx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
dpll44xx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
fapll.c clk: ti: Fix memleak in ti_fapll_synth_setup 2020-12-17 01:46:37 -08:00
fixed-factor.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
gate.c clk: ti: Remove unused functions 2019-06-07 11:54:48 -07:00
interface.c clk: ti: generalize the init sequence of clk_hw_omap clocks 2019-02-15 16:46:22 +02:00
mux.c clk: ti: Remove unused functions 2019-06-07 11:54:48 -07:00