74e78d6bae
According to hardware user manual, bits5~7 in register
HCLGE_MISC_VECTOR_INT_STS means reset interrupts status,
but HCLGE_RESET_INT_M is defined as bits0~2 now. So it
will make hclge_reset_err_handle() read the wrong reset
interrupt status.
This patch fixes this wrong bit mask.
Fixes:
|
||
---|---|---|
.. | ||
hns3pf | ||
hns3vf | ||
Makefile | ||
hclge_mbx.h | ||
hnae3.c | ||
hnae3.h | ||
hns3_dcbnl.c | ||
hns3_debugfs.c | ||
hns3_enet.c | ||
hns3_enet.h | ||
hns3_ethtool.c |