Imre Deak 450174fe9c drm/i915/chv: Tune L3 SQC credits based on actual latencies ... While browsing BSpec I bumped into a note saying we need to tune these values based on actual measurements done after initial enabling. I've checked that it indeed improves things on BXT. I haven't checked this on CHV, but here it is if someone wants to give it a go. v2: - Add note about the discrepancy wrt. to the spec in the formula calculating the credit encodings. (Mika, Ville) - Move the WA comment to the new function. (Ville) v3: - Keep the comment about the SQC WA in the caller. (Ville) CC: Ville Syrjälä <ville.syrjala@linux.intel.com> CC: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-4-git-send-email-imre.deak@intel.com		2016-05-03 16:49:19 +03:00
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drm	drm/i915/chv: Tune L3 SQC credits based on actual latencies	2016-05-03 16:49:19 +03:00
host1x	Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux	2016-03-21 13:48:00 -07:00
ipu-v3	gpu: ipu-v3: ipu-dmfc: Rename ipu_dmfc_init_channel to ipu_dmfc_config_wait4eot	2016-03-31 11:24:33 +02:00
vga	vga_switcheroo: Add support for switching only the DDC	2016-02-09 11:21:07 +01:00
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