![viresh kumar](/assets/img/avatar_default.png)
Define common clk_init routine in plat/clock.c for calling recalc_root_clocks. This routine will be used for any common code across all machine families. Whereas family specific spear*xx_clk_init routines will be used for family specific code. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
184 lines
4.2 KiB
C
184 lines
4.2 KiB
C
/*
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* arch/arm/mach-spear6xx/spear6xx.c
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*
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* SPEAr6XX machines common source file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Rajeev Kumar<rajeev-dlh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/types.h>
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#include <linux/amba/pl061.h>
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#include <linux/ptrace.h>
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#include <linux/io.h>
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#include <asm/hardware/vic.h>
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#include <asm/irq.h>
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#include <asm/mach/arch.h>
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#include <mach/generic.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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/* Add spear6xx machines common devices here */
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/* uart device registration */
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struct amba_device uart_device[] = {
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{
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.dev = {
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.init_name = "uart0",
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},
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.res = {
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.start = SPEAR6XX_ICM1_UART0_BASE,
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.end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_UART_0, NO_IRQ},
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}, {
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.dev = {
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.init_name = "uart1",
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},
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.res = {
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.start = SPEAR6XX_ICM1_UART1_BASE,
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.end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_UART_1, NO_IRQ},
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}
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};
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/* gpio device registration */
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static struct pl061_platform_data gpio_plat_data[] = {
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{
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.gpio_base = 0,
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.irq_base = SPEAR_GPIO0_INT_BASE,
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}, {
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.gpio_base = 8,
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.irq_base = SPEAR_GPIO1_INT_BASE,
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}, {
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.gpio_base = 16,
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.irq_base = SPEAR_GPIO2_INT_BASE,
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},
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};
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struct amba_device gpio_device[] = {
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{
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.dev = {
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.init_name = "gpio0",
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.platform_data = &gpio_plat_data[0],
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},
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.res = {
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.start = SPEAR6XX_CPU_GPIO_BASE,
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.end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_LOCAL_GPIO, NO_IRQ},
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}, {
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.dev = {
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.init_name = "gpio1",
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.platform_data = &gpio_plat_data[1],
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},
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.res = {
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.start = SPEAR6XX_ICM3_GPIO_BASE,
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.end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_BASIC_GPIO, NO_IRQ},
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}, {
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.dev = {
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.init_name = "gpio2",
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.platform_data = &gpio_plat_data[2],
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},
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.res = {
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.start = SPEAR6XX_ICM2_GPIO_BASE,
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.end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_APPL_GPIO, NO_IRQ},
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}
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};
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/* This will add devices, and do machine specific tasks */
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void __init spear6xx_init(void)
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{
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/* nothing to do for now */
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}
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/* This will initialize vic */
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void __init spear6xx_init_irq(void)
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{
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vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
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vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
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}
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/* Following will create static virtual/physical mappings */
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static struct map_desc spear6xx_io_desc[] __initdata = {
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{
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.virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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},
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};
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/* This will create static memory mapping for selected devices */
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void __init spear6xx_map_io(void)
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{
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iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
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/* This will initialize clock framework */
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spear6xx_clk_init();
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}
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static void __init spear6xx_timer_init(void)
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{
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char pclk_name[] = "pll3_48m_clk";
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struct clk *gpt_clk, *pclk;
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/* get the system timer clock */
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gpt_clk = clk_get_sys("gpt0", NULL);
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if (IS_ERR(gpt_clk)) {
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pr_err("%s:couldn't get clk for gpt\n", __func__);
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BUG();
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}
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/* get the suitable parent clock for timer*/
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pclk = clk_get(NULL, pclk_name);
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if (IS_ERR(pclk)) {
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pr_err("%s:couldn't get %s as parent for gpt\n",
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__func__, pclk_name);
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BUG();
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}
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clk_set_parent(gpt_clk, pclk);
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clk_put(gpt_clk);
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clk_put(pclk);
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spear_setup_timer();
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}
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struct sys_timer spear6xx_timer = {
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.init = spear6xx_timer_init,
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};
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