7a9ad671ac
It turns out that all platforms using the ICST VCO are really just touching two registers, and in the same way as well: one register with the VCO configuration as such, and one lock register that makes it possible to write to the VCO. Factor this register read/write into the ICST driver so we can reuse it in the IM-PD1 driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
85 lines
2.2 KiB
C
85 lines
2.2 KiB
C
/*
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* Clock driver for the ARM Integrator/AP and Integrator/CP boards
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* Copyright (C) 2012 Linus Walleij
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/platform_data/clk-integrator.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include "clk-icst.h"
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/*
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* Implementation of the ARM Integrator/AP and Integrator/CP clock tree.
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* Inspired by portions of:
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* plat-versatile/clock.c and plat-versatile/include/plat/clock.h
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*/
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static const struct icst_params cp_auxvco_params = {
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.ref = 24000000,
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.vco_max = ICST525_VCO_MAX_5V,
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.vco_min = ICST525_VCO_MIN,
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.vd_min = 8,
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.vd_max = 263,
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.rd_min = 3,
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.rd_max = 65,
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.s2div = icst525_s2div,
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.idx2s = icst525_idx2s,
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};
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static const struct clk_icst_desc __initdata cp_icst_desc = {
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.params = &cp_auxvco_params,
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.vco_offset = 0x1c,
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.lock_offset = INTEGRATOR_HDR_LOCK_OFFSET,
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};
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/*
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* integrator_clk_init() - set up the integrator clock tree
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* @is_cp: pass true if it's the Integrator/CP else AP is assumed
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*/
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void __init integrator_clk_init(bool is_cp)
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{
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struct clk *clk;
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/* APB clock dummy */
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clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
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clk_register_clkdev(clk, "apb_pclk", NULL);
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/* UART reference clock */
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clk = clk_register_fixed_rate(NULL, "uartclk", NULL, CLK_IS_ROOT,
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14745600);
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clk_register_clkdev(clk, NULL, "uart0");
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clk_register_clkdev(clk, NULL, "uart1");
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if (is_cp)
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clk_register_clkdev(clk, NULL, "mmci");
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/* 24 MHz clock */
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clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
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24000000);
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clk_register_clkdev(clk, NULL, "kmi0");
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clk_register_clkdev(clk, NULL, "kmi1");
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if (!is_cp)
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clk_register_clkdev(clk, NULL, "ap_timer");
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if (!is_cp)
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return;
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/* 1 MHz clock */
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clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
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1000000);
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clk_register_clkdev(clk, NULL, "sp804");
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/* ICST VCO clock used on the Integrator/CP CLCD */
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clk = icst_clk_register(NULL, &cp_icst_desc,
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__io_address(INTEGRATOR_HDR_BASE));
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clk_register_clkdev(clk, NULL, "clcd");
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}
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