![Ville Syrjälä](/assets/img/avatar_default.png)
Replace uses of fb->bits_per_pixel with fb->format->cpp[0]*8. Less duplicated information is a good thing. Note that I didn't put parens around the cpp*8 in the below cocci script, on account of not wanting spurious parens all over the place. Instead I did the unsafe way, and tried to look over the entire diff to spot if any dangerous expressions were produced. I didn't see any. There are some cases where previously the code did X*bpp/8, so the division happened after the multiplication. Those are now just X*cpp so the division effectively happens before the multiplication, but that is perfectly fine since bpp is always a multiple of 8. @@ struct drm_framebuffer *FB; expression E; @@ drm_helper_mode_fill_fb_struct(...) { ... - FB->bits_per_pixel = E; ... } @@ struct drm_framebuffer *FB; expression E; @@ i9xx_get_initial_plane_config(...) { ... - FB->bits_per_pixel = E; ... } @@ struct drm_framebuffer *FB; expression E; @@ ironlake_get_initial_plane_config(...) { ... - FB->bits_per_pixel = E; ... } @@ struct drm_framebuffer *FB; expression E; @@ skylake_get_initial_plane_config(...) { ... - FB->bits_per_pixel = E; ... } @@ struct drm_framebuffer FB; expression E; @@ ( - E * FB.bits_per_pixel / 8 + E * FB.format->cpp[0] | - FB.bits_per_pixel / 8 + FB.format->cpp[0] | - E * FB.bits_per_pixel >> 3 + E * FB.format->cpp[0] | - FB.bits_per_pixel >> 3 + FB.format->cpp[0] | - (FB.bits_per_pixel + 7) / 8 + FB.format->cpp[0] | - FB.bits_per_pixel + FB.format->cpp[0] * 8 | - FB.format->cpp[0] * 8 != 8 + FB.format->cpp[0] != 1 ) @@ struct drm_framebuffer *FB; expression E; @@ ( - E * FB->bits_per_pixel / 8 + E * FB->format->cpp[0] | - FB->bits_per_pixel / 8 + FB->format->cpp[0] | - E * FB->bits_per_pixel >> 3 + E * FB->format->cpp[0] | - FB->bits_per_pixel >> 3 + FB->format->cpp[0] | - (FB->bits_per_pixel + 7) / 8 + FB->format->cpp[0] | - FB->bits_per_pixel + FB->format->cpp[0] * 8 | - FB->format->cpp[0] * 8 != 8 + FB->format->cpp[0] != 1 ) @@ struct drm_plane_state *state; expression E; @@ ( - E * state->fb->bits_per_pixel / 8 + E * state->fb->format->cpp[0] | - state->fb->bits_per_pixel / 8 + state->fb->format->cpp[0] | - E * state->fb->bits_per_pixel >> 3 + E * state->fb->format->cpp[0] | - state->fb->bits_per_pixel >> 3 + state->fb->format->cpp[0] | - (state->fb->bits_per_pixel + 7) / 8 + state->fb->format->cpp[0] | - state->fb->bits_per_pixel + state->fb->format->cpp[0] * 8 | - state->fb->format->cpp[0] * 8 != 8 + state->fb->format->cpp[0] != 1 ) @@ @@ - (8 * 8) + 8 * 8 @@ struct drm_framebuffer FB; @@ - (FB.format->cpp[0]) + FB.format->cpp[0] @@ struct drm_framebuffer *FB; @@ - (FB->format->cpp[0]) + FB->format->cpp[0] @@ @@ struct drm_framebuffer { ... - int bits_per_pixel; ... }; v2: Clean up the 'cpp*8 != 8' and '(8 * 8)' cases (Laurent) v3: Adjusted the semantic patch a bit and regenerated due to code changes Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Link: http://patchwork.freedesktop.org/patch/msgid/1481751140-18352-1-git-send-email-ville.syrjala@linux.intel.com
591 lines
14 KiB
C
591 lines
14 KiB
C
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/*
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* Copyright 2012 Red Hat
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License version 2. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Authors: Matthew Garrett
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* Dave Airlie
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*
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* Portions of this code derived from cirrusfb.c:
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* drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
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*
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* Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
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*/
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <video/cirrus.h>
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#include "cirrus_drv.h"
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#define CIRRUS_LUT_SIZE 256
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#define PALETTE_INDEX 0x8
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#define PALETTE_DATA 0x9
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/*
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* This file contains setup code for the CRTC.
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*/
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static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
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{
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struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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int i;
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if (!crtc->enabled)
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return;
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for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
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/* VGA registers */
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WREG8(PALETTE_INDEX, i);
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WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
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WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
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WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
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}
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}
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/*
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* The DRM core requires DPMS functions, but they make little sense in our
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* case and so are just stubs
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*/
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static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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u8 sr01, gr0e;
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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sr01 = 0x00;
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gr0e = 0x00;
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break;
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case DRM_MODE_DPMS_STANDBY:
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sr01 = 0x20;
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gr0e = 0x02;
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break;
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case DRM_MODE_DPMS_SUSPEND:
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sr01 = 0x20;
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gr0e = 0x04;
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break;
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case DRM_MODE_DPMS_OFF:
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sr01 = 0x20;
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gr0e = 0x06;
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break;
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default:
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return;
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}
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WREG8(SEQ_INDEX, 0x1);
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sr01 |= RREG8(SEQ_DATA) & ~0x20;
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WREG_SEQ(0x1, sr01);
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WREG8(GFX_INDEX, 0xe);
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gr0e |= RREG8(GFX_DATA) & ~0x06;
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WREG_GFX(0xe, gr0e);
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}
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static void cirrus_set_start_address(struct drm_crtc *crtc, unsigned offset)
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{
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struct cirrus_device *cdev = crtc->dev->dev_private;
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u32 addr;
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u8 tmp;
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addr = offset >> 2;
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WREG_CRT(0x0c, (u8)((addr >> 8) & 0xff));
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WREG_CRT(0x0d, (u8)(addr & 0xff));
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WREG8(CRT_INDEX, 0x1b);
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tmp = RREG8(CRT_DATA);
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tmp &= 0xf2;
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tmp |= (addr >> 16) & 0x01;
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tmp |= (addr >> 15) & 0x0c;
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WREG_CRT(0x1b, tmp);
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WREG8(CRT_INDEX, 0x1d);
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tmp = RREG8(CRT_DATA);
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tmp &= 0x7f;
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tmp |= (addr >> 12) & 0x80;
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WREG_CRT(0x1d, tmp);
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}
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/* cirrus is different - we will force move buffers out of VRAM */
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static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int x, int y, int atomic)
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{
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struct cirrus_device *cdev = crtc->dev->dev_private;
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struct drm_gem_object *obj;
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struct cirrus_framebuffer *cirrus_fb;
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struct cirrus_bo *bo;
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int ret;
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u64 gpu_addr;
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/* push the previous fb to system ram */
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if (!atomic && fb) {
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cirrus_fb = to_cirrus_framebuffer(fb);
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obj = cirrus_fb->obj;
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bo = gem_to_cirrus_bo(obj);
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ret = cirrus_bo_reserve(bo, false);
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if (ret)
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return ret;
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cirrus_bo_push_sysram(bo);
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cirrus_bo_unreserve(bo);
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}
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cirrus_fb = to_cirrus_framebuffer(crtc->primary->fb);
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obj = cirrus_fb->obj;
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bo = gem_to_cirrus_bo(obj);
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ret = cirrus_bo_reserve(bo, false);
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if (ret)
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return ret;
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ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
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if (ret) {
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cirrus_bo_unreserve(bo);
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return ret;
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}
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if (&cdev->mode_info.gfbdev->gfb == cirrus_fb) {
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/* if pushing console in kmap it */
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ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
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if (ret)
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DRM_ERROR("failed to kmap fbcon\n");
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}
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cirrus_bo_unreserve(bo);
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cirrus_set_start_address(crtc, (u32)gpu_addr);
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return 0;
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}
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static int cirrus_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
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}
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/*
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* The meat of this driver. The core passes us a mode and we have to program
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* it. The modesetting here is the bare minimum required to satisfy the qemu
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* emulation of this hardware, and running this against a real device is
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* likely to result in an inadequately programmed mode. We've already had
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* the opportunity to modify the mode, so whatever we receive here should
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* be something that can be correctly programmed and displayed
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*/
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static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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int x, int y, struct drm_framebuffer *old_fb)
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{
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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const struct drm_framebuffer *fb = crtc->primary->fb;
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int hsyncstart, hsyncend, htotal, hdispend;
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int vtotal, vdispend;
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int tmp;
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int sr07 = 0, hdr = 0;
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htotal = mode->htotal / 8;
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hsyncend = mode->hsync_end / 8;
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hsyncstart = mode->hsync_start / 8;
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hdispend = mode->hdisplay / 8;
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vtotal = mode->vtotal;
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vdispend = mode->vdisplay;
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vdispend -= 1;
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vtotal -= 2;
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htotal -= 5;
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hdispend -= 1;
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hsyncstart += 1;
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hsyncend += 1;
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WREG_CRT(VGA_CRTC_V_SYNC_END, 0x20);
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WREG_CRT(VGA_CRTC_H_TOTAL, htotal);
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WREG_CRT(VGA_CRTC_H_DISP, hdispend);
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WREG_CRT(VGA_CRTC_H_SYNC_START, hsyncstart);
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WREG_CRT(VGA_CRTC_H_SYNC_END, hsyncend);
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WREG_CRT(VGA_CRTC_V_TOTAL, vtotal & 0xff);
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WREG_CRT(VGA_CRTC_V_DISP_END, vdispend & 0xff);
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tmp = 0x40;
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if ((vdispend + 1) & 512)
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tmp |= 0x20;
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WREG_CRT(VGA_CRTC_MAX_SCAN, tmp);
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/*
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* Overflow bits for values that don't fit in the standard registers
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*/
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tmp = 16;
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if (vtotal & 256)
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tmp |= 1;
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if (vdispend & 256)
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tmp |= 2;
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if ((vdispend + 1) & 256)
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tmp |= 8;
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if (vtotal & 512)
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tmp |= 32;
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if (vdispend & 512)
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tmp |= 64;
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WREG_CRT(VGA_CRTC_OVERFLOW, tmp);
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tmp = 0;
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/* More overflow bits */
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if ((htotal + 5) & 64)
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tmp |= 16;
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if ((htotal + 5) & 128)
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tmp |= 32;
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if (vtotal & 256)
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tmp |= 64;
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if (vtotal & 512)
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tmp |= 128;
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WREG_CRT(CL_CRT1A, tmp);
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/* Disable Hercules/CGA compatibility */
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WREG_CRT(VGA_CRTC_MODE, 0x03);
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WREG8(SEQ_INDEX, 0x7);
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sr07 = RREG8(SEQ_DATA);
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sr07 &= 0xe0;
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hdr = 0;
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switch (fb->format->cpp[0] * 8) {
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case 8:
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sr07 |= 0x11;
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break;
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case 16:
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sr07 |= 0x17;
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hdr = 0xc1;
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break;
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case 24:
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sr07 |= 0x15;
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hdr = 0xc5;
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break;
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case 32:
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sr07 |= 0x19;
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hdr = 0xc5;
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break;
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default:
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return -1;
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}
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WREG_SEQ(0x7, sr07);
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/* Program the pitch */
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tmp = fb->pitches[0] / 8;
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WREG_CRT(VGA_CRTC_OFFSET, tmp);
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/* Enable extended blanking and pitch bits, and enable full memory */
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tmp = 0x22;
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tmp |= (fb->pitches[0] >> 7) & 0x10;
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tmp |= (fb->pitches[0] >> 6) & 0x40;
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WREG_CRT(0x1b, tmp);
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/* Enable high-colour modes */
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WREG_GFX(VGA_GFX_MODE, 0x40);
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/* And set graphics mode */
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WREG_GFX(VGA_GFX_MISC, 0x01);
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WREG_HDR(hdr);
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cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
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/* Unblank (needed on S3 resume, vgabios doesn't do it then) */
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outb(0x20, 0x3c0);
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return 0;
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}
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/*
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* This is called before a mode is programmed. A typical use might be to
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* enable DPMS during the programming to avoid seeing intermediate stages,
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* but that's not relevant to us
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*/
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static void cirrus_crtc_prepare(struct drm_crtc *crtc)
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{
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}
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/*
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* This is called after a mode is programmed. It should reverse anything done
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* by the prepare function
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*/
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static void cirrus_crtc_commit(struct drm_crtc *crtc)
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{
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}
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/*
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* The core can pass us a set of gamma values to program. We actually only
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* use this for 8-bit mode so can't perform smooth fades on deeper modes,
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* but it's a requirement that we provide the function
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*/
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static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
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u16 *blue, uint32_t size)
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{
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struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
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int i;
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for (i = 0; i < size; i++) {
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cirrus_crtc->lut_r[i] = red[i];
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cirrus_crtc->lut_g[i] = green[i];
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cirrus_crtc->lut_b[i] = blue[i];
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}
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cirrus_crtc_load_lut(crtc);
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return 0;
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}
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/* Simple cleanup function */
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static void cirrus_crtc_destroy(struct drm_crtc *crtc)
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{
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struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
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drm_crtc_cleanup(crtc);
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kfree(cirrus_crtc);
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}
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/* These provide the minimum set of functions required to handle a CRTC */
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static const struct drm_crtc_funcs cirrus_crtc_funcs = {
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.gamma_set = cirrus_crtc_gamma_set,
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.set_config = drm_crtc_helper_set_config,
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.destroy = cirrus_crtc_destroy,
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};
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static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {
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.dpms = cirrus_crtc_dpms,
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.mode_set = cirrus_crtc_mode_set,
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.mode_set_base = cirrus_crtc_mode_set_base,
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.prepare = cirrus_crtc_prepare,
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.commit = cirrus_crtc_commit,
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.load_lut = cirrus_crtc_load_lut,
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};
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/* CRTC setup */
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static void cirrus_crtc_init(struct drm_device *dev)
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{
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struct cirrus_device *cdev = dev->dev_private;
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struct cirrus_crtc *cirrus_crtc;
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int i;
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cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
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(CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
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GFP_KERNEL);
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if (cirrus_crtc == NULL)
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return;
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drm_crtc_init(dev, &cirrus_crtc->base, &cirrus_crtc_funcs);
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drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
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cdev->mode_info.crtc = cirrus_crtc;
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for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
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cirrus_crtc->lut_r[i] = i;
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cirrus_crtc->lut_g[i] = i;
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cirrus_crtc->lut_b[i] = i;
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}
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drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
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}
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/** Sets the color ramps on behalf of fbcon */
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void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
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u16 blue, int regno)
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{
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struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
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cirrus_crtc->lut_r[regno] = red;
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cirrus_crtc->lut_g[regno] = green;
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cirrus_crtc->lut_b[regno] = blue;
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}
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/** Gets the color ramps on behalf of fbcon */
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void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
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u16 *blue, int regno)
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{
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struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
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*red = cirrus_crtc->lut_r[regno];
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*green = cirrus_crtc->lut_g[regno];
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*blue = cirrus_crtc->lut_b[regno];
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}
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static void cirrus_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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}
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static void cirrus_encoder_dpms(struct drm_encoder *encoder, int state)
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{
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return;
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}
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static void cirrus_encoder_prepare(struct drm_encoder *encoder)
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{
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}
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static void cirrus_encoder_commit(struct drm_encoder *encoder)
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{
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}
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static void cirrus_encoder_destroy(struct drm_encoder *encoder)
|
|
{
|
|
struct cirrus_encoder *cirrus_encoder = to_cirrus_encoder(encoder);
|
|
drm_encoder_cleanup(encoder);
|
|
kfree(cirrus_encoder);
|
|
}
|
|
|
|
static const struct drm_encoder_helper_funcs cirrus_encoder_helper_funcs = {
|
|
.dpms = cirrus_encoder_dpms,
|
|
.mode_set = cirrus_encoder_mode_set,
|
|
.prepare = cirrus_encoder_prepare,
|
|
.commit = cirrus_encoder_commit,
|
|
};
|
|
|
|
static const struct drm_encoder_funcs cirrus_encoder_encoder_funcs = {
|
|
.destroy = cirrus_encoder_destroy,
|
|
};
|
|
|
|
static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev)
|
|
{
|
|
struct drm_encoder *encoder;
|
|
struct cirrus_encoder *cirrus_encoder;
|
|
|
|
cirrus_encoder = kzalloc(sizeof(struct cirrus_encoder), GFP_KERNEL);
|
|
if (!cirrus_encoder)
|
|
return NULL;
|
|
|
|
encoder = &cirrus_encoder->base;
|
|
encoder->possible_crtcs = 0x1;
|
|
|
|
drm_encoder_init(dev, encoder, &cirrus_encoder_encoder_funcs,
|
|
DRM_MODE_ENCODER_DAC, NULL);
|
|
drm_encoder_helper_add(encoder, &cirrus_encoder_helper_funcs);
|
|
|
|
return encoder;
|
|
}
|
|
|
|
|
|
static int cirrus_vga_get_modes(struct drm_connector *connector)
|
|
{
|
|
int count;
|
|
|
|
/* Just add a static list of modes */
|
|
if (cirrus_bpp <= 24) {
|
|
count = drm_add_modes_noedid(connector, 1280, 1024);
|
|
drm_set_preferred_mode(connector, 1024, 768);
|
|
} else {
|
|
count = drm_add_modes_noedid(connector, 800, 600);
|
|
drm_set_preferred_mode(connector, 800, 600);
|
|
}
|
|
return count;
|
|
}
|
|
|
|
static struct drm_encoder *cirrus_connector_best_encoder(struct drm_connector
|
|
*connector)
|
|
{
|
|
int enc_id = connector->encoder_ids[0];
|
|
/* pick the encoder ids */
|
|
if (enc_id)
|
|
return drm_encoder_find(connector->dev, enc_id);
|
|
return NULL;
|
|
}
|
|
|
|
static void cirrus_connector_destroy(struct drm_connector *connector)
|
|
{
|
|
drm_connector_cleanup(connector);
|
|
kfree(connector);
|
|
}
|
|
|
|
static const struct drm_connector_helper_funcs cirrus_vga_connector_helper_funcs = {
|
|
.get_modes = cirrus_vga_get_modes,
|
|
.best_encoder = cirrus_connector_best_encoder,
|
|
};
|
|
|
|
static const struct drm_connector_funcs cirrus_vga_connector_funcs = {
|
|
.dpms = drm_helper_connector_dpms,
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
.destroy = cirrus_connector_destroy,
|
|
};
|
|
|
|
static struct drm_connector *cirrus_vga_init(struct drm_device *dev)
|
|
{
|
|
struct drm_connector *connector;
|
|
struct cirrus_connector *cirrus_connector;
|
|
|
|
cirrus_connector = kzalloc(sizeof(struct cirrus_connector), GFP_KERNEL);
|
|
if (!cirrus_connector)
|
|
return NULL;
|
|
|
|
connector = &cirrus_connector->base;
|
|
|
|
drm_connector_init(dev, connector,
|
|
&cirrus_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
|
|
|
drm_connector_helper_add(connector, &cirrus_vga_connector_helper_funcs);
|
|
|
|
drm_connector_register(connector);
|
|
return connector;
|
|
}
|
|
|
|
|
|
int cirrus_modeset_init(struct cirrus_device *cdev)
|
|
{
|
|
struct drm_encoder *encoder;
|
|
struct drm_connector *connector;
|
|
int ret;
|
|
|
|
drm_mode_config_init(cdev->dev);
|
|
cdev->mode_info.mode_config_initialized = true;
|
|
|
|
cdev->dev->mode_config.max_width = CIRRUS_MAX_FB_WIDTH;
|
|
cdev->dev->mode_config.max_height = CIRRUS_MAX_FB_HEIGHT;
|
|
|
|
cdev->dev->mode_config.fb_base = cdev->mc.vram_base;
|
|
cdev->dev->mode_config.preferred_depth = 24;
|
|
/* don't prefer a shadow on virt GPU */
|
|
cdev->dev->mode_config.prefer_shadow = 0;
|
|
|
|
cirrus_crtc_init(cdev->dev);
|
|
|
|
encoder = cirrus_encoder_init(cdev->dev);
|
|
if (!encoder) {
|
|
DRM_ERROR("cirrus_encoder_init failed\n");
|
|
return -1;
|
|
}
|
|
|
|
connector = cirrus_vga_init(cdev->dev);
|
|
if (!connector) {
|
|
DRM_ERROR("cirrus_vga_init failed\n");
|
|
return -1;
|
|
}
|
|
|
|
drm_mode_connector_attach_encoder(connector, encoder);
|
|
|
|
ret = cirrus_fbdev_init(cdev);
|
|
if (ret) {
|
|
DRM_ERROR("cirrus_fbdev_init failed\n");
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void cirrus_modeset_fini(struct cirrus_device *cdev)
|
|
{
|
|
cirrus_fbdev_fini(cdev);
|
|
|
|
if (cdev->mode_info.mode_config_initialized) {
|
|
drm_mode_config_cleanup(cdev->dev);
|
|
cdev->mode_info.mode_config_initialized = false;
|
|
}
|
|
}
|