![Lucas Stach](/assets/img/avatar_default.png)
There are 3 big benefits to suballocating a single big DMA buffer for command submission: 1. Avoid hammering CMA. The old way of allocating and freeing a DMA buffer for each submission was hitting some of the real slow pathes in CMA, as this allocator was not designed for a concurrent small buffers load. 2. Less TLB flushes on IOMMUv2. If a new command buffer is mapped into the GPU address space the MMU TLBs need to be flushed. By having one big buffer statically mapped to the GPU, a lot of those flushes can be avoided. 3. No funky workarounds for GC3000. The FE TLB flush on GC3000 isn't reliable. To work around that we tried to lay out the cmdbufs in the GPU address space in a way to avoid this issue. This hasn't always worked if the address space is crowded. A single statically mapped buffer avoids the erratum completely. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
154 lines
4 KiB
C
154 lines
4 KiB
C
/*
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* Copyright (C) 2017 Etnaviv Project
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <drm/drm_mm.h>
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#include "etnaviv_cmdbuf.h"
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#include "etnaviv_gpu.h"
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#include "etnaviv_mmu.h"
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#define SUBALLOC_SIZE SZ_256K
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#define SUBALLOC_GRANULE SZ_4K
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#define SUBALLOC_GRANULES (SUBALLOC_SIZE / SUBALLOC_GRANULE)
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struct etnaviv_cmdbuf_suballoc {
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/* suballocated dma buffer properties */
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struct etnaviv_gpu *gpu;
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void *vaddr;
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dma_addr_t paddr;
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/* GPU mapping */
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u32 iova;
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struct drm_mm_node vram_node; /* only used on MMUv2 */
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/* allocation management */
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struct mutex lock;
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DECLARE_BITMAP(granule_map, SUBALLOC_GRANULES);
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int free_space;
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wait_queue_head_t free_event;
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};
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struct etnaviv_cmdbuf_suballoc *
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etnaviv_cmdbuf_suballoc_new(struct etnaviv_gpu * gpu)
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{
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struct etnaviv_cmdbuf_suballoc *suballoc;
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int ret;
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suballoc = kzalloc(sizeof(*suballoc), GFP_KERNEL);
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if (!suballoc)
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return ERR_PTR(-ENOMEM);
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suballoc->gpu = gpu;
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mutex_init(&suballoc->lock);
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init_waitqueue_head(&suballoc->free_event);
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suballoc->vaddr = dma_alloc_wc(gpu->dev, SUBALLOC_SIZE,
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&suballoc->paddr, GFP_KERNEL);
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if (!suballoc->vaddr)
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goto free_suballoc;
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ret = etnaviv_iommu_get_suballoc_va(gpu, suballoc->paddr,
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&suballoc->vram_node, SUBALLOC_SIZE,
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&suballoc->iova);
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if (ret)
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goto free_dma;
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return suballoc;
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free_dma:
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dma_free_wc(gpu->dev, SUBALLOC_SIZE, suballoc->vaddr, suballoc->paddr);
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free_suballoc:
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kfree(suballoc);
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return NULL;
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}
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void etnaviv_cmdbuf_suballoc_destroy(struct etnaviv_cmdbuf_suballoc *suballoc)
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{
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etnaviv_iommu_put_suballoc_va(suballoc->gpu, &suballoc->vram_node,
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SUBALLOC_SIZE, suballoc->iova);
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dma_free_wc(suballoc->gpu->dev, SUBALLOC_SIZE, suballoc->vaddr,
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suballoc->paddr);
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kfree(suballoc);
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}
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struct etnaviv_cmdbuf *
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etnaviv_cmdbuf_new(struct etnaviv_cmdbuf_suballoc *suballoc, u32 size,
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size_t nr_bos)
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{
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struct etnaviv_cmdbuf *cmdbuf;
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size_t sz = size_vstruct(nr_bos, sizeof(cmdbuf->bo_map[0]),
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sizeof(*cmdbuf));
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int granule_offs, order, ret;
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cmdbuf = kzalloc(sz, GFP_KERNEL);
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if (!cmdbuf)
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return NULL;
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cmdbuf->suballoc = suballoc;
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cmdbuf->size = size;
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order = order_base_2(ALIGN(size, SUBALLOC_GRANULE) / SUBALLOC_GRANULE);
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retry:
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mutex_lock(&suballoc->lock);
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granule_offs = bitmap_find_free_region(suballoc->granule_map,
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SUBALLOC_GRANULES, order);
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if (granule_offs < 0) {
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suballoc->free_space = 0;
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mutex_unlock(&suballoc->lock);
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ret = wait_event_interruptible_timeout(suballoc->free_event,
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suballoc->free_space,
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msecs_to_jiffies(10 * 1000));
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if (!ret) {
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dev_err(suballoc->gpu->dev,
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"Timeout waiting for cmdbuf space\n");
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return NULL;
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}
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goto retry;
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}
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mutex_unlock(&suballoc->lock);
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cmdbuf->suballoc_offset = granule_offs * SUBALLOC_GRANULE;
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cmdbuf->vaddr = suballoc->vaddr + cmdbuf->suballoc_offset;
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return cmdbuf;
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}
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void etnaviv_cmdbuf_free(struct etnaviv_cmdbuf *cmdbuf)
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{
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struct etnaviv_cmdbuf_suballoc *suballoc = cmdbuf->suballoc;
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int order = order_base_2(ALIGN(cmdbuf->size, SUBALLOC_GRANULE) /
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SUBALLOC_GRANULE);
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mutex_lock(&suballoc->lock);
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bitmap_release_region(suballoc->granule_map,
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cmdbuf->suballoc_offset / SUBALLOC_GRANULE,
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order);
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suballoc->free_space = 1;
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mutex_unlock(&suballoc->lock);
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wake_up_all(&suballoc->free_event);
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kfree(cmdbuf);
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}
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u32 etnaviv_cmdbuf_get_va(struct etnaviv_cmdbuf *buf)
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{
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return buf->suballoc->iova + buf->suballoc_offset;
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}
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dma_addr_t etnaviv_cmdbuf_get_pa(struct etnaviv_cmdbuf *buf)
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{
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return buf->suballoc->paddr + buf->suballoc_offset;
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}
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