e66774dd6f
There are 3 big benefits to suballocating a single big DMA buffer for command submission: 1. Avoid hammering CMA. The old way of allocating and freeing a DMA buffer for each submission was hitting some of the real slow pathes in CMA, as this allocator was not designed for a concurrent small buffers load. 2. Less TLB flushes on IOMMUv2. If a new command buffer is mapped into the GPU address space the MMU TLBs need to be flushed. By having one big buffer statically mapped to the GPU, a lot of those flushes can be avoided. 3. No funky workarounds for GC3000. The FE TLB flush on GC3000 isn't reliable. To work around that we tried to lay out the cmdbufs in the GPU address space in a way to avoid this issue. This hasn't always worked if the address space is crowded. A single statically mapped buffer avoids the erratum completely. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
79 lines
2.4 KiB
C
79 lines
2.4 KiB
C
/*
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* Copyright (C) 2015 Etnaviv Project
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ETNAVIV_MMU_H__
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#define __ETNAVIV_MMU_H__
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#include <linux/iommu.h>
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enum etnaviv_iommu_version {
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ETNAVIV_IOMMU_V1 = 0,
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ETNAVIV_IOMMU_V2,
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};
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struct etnaviv_gpu;
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struct etnaviv_vram_mapping;
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struct etnaviv_iommu_ops {
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struct iommu_ops ops;
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size_t (*dump_size)(struct iommu_domain *);
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void (*dump)(struct iommu_domain *, void *);
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};
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struct etnaviv_iommu {
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struct etnaviv_gpu *gpu;
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struct iommu_domain *domain;
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enum etnaviv_iommu_version version;
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/* memory manager for GPU address area */
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struct mutex lock;
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struct list_head mappings;
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struct drm_mm mm;
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u32 last_iova;
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bool need_flush;
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};
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struct etnaviv_gem_object;
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int etnaviv_iommu_attach(struct etnaviv_iommu *iommu, const char **names,
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int cnt);
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int etnaviv_iommu_map(struct etnaviv_iommu *iommu, u32 iova,
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struct sg_table *sgt, unsigned len, int prot);
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int etnaviv_iommu_unmap(struct etnaviv_iommu *iommu, u32 iova,
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struct sg_table *sgt, unsigned len);
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int etnaviv_iommu_map_gem(struct etnaviv_iommu *mmu,
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struct etnaviv_gem_object *etnaviv_obj, u32 memory_base,
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struct etnaviv_vram_mapping *mapping);
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void etnaviv_iommu_unmap_gem(struct etnaviv_iommu *mmu,
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struct etnaviv_vram_mapping *mapping);
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void etnaviv_iommu_destroy(struct etnaviv_iommu *iommu);
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int etnaviv_iommu_get_suballoc_va(struct etnaviv_gpu *gpu, dma_addr_t paddr,
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struct drm_mm_node *vram_node, size_t size,
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u32 *iova);
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void etnaviv_iommu_put_suballoc_va(struct etnaviv_gpu *gpu,
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struct drm_mm_node *vram_node, size_t size,
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u32 iova);
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size_t etnaviv_iommu_dump_size(struct etnaviv_iommu *iommu);
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void etnaviv_iommu_dump(struct etnaviv_iommu *iommu, void *buf);
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struct etnaviv_iommu *etnaviv_iommu_new(struct etnaviv_gpu *gpu);
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void etnaviv_iommu_restore(struct etnaviv_gpu *gpu);
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#endif /* __ETNAVIV_MMU_H__ */
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