![Neil Armstrong](/assets/img/avatar_default.png)
This commit fixes the VDAC disabling register write values.
Fixes: bbbe775ec5
("drm: Add support for Amlogic Meson Graphic Controller")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
294 lines
7.9 KiB
C
294 lines
7.9 KiB
C
/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
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* Copyright (C) 2014 Endless Mobile
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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* Written by:
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* Jasper St. Pierre <jstpierre@mecheye.net>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_graph.h>
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#include <drm/drmP.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_atomic_helper.h>
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#include "meson_venc_cvbs.h"
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#include "meson_venc.h"
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#include "meson_registers.h"
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/* HHI VDAC Registers */
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#define HHI_VDAC_CNTL0 0x2F4 /* 0xbd offset in data sheet */
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#define HHI_VDAC_CNTL1 0x2F8 /* 0xbe offset in data sheet */
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struct meson_venc_cvbs {
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struct drm_encoder encoder;
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struct drm_connector connector;
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struct meson_drm *priv;
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};
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#define encoder_to_meson_venc_cvbs(x) \
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container_of(x, struct meson_venc_cvbs, encoder)
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#define connector_to_meson_venc_cvbs(x) \
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container_of(x, struct meson_venc_cvbs, connector)
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/* Supported Modes */
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struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = {
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{ /* PAL */
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.enci = &meson_cvbs_enci_pal,
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.mode = {
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DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500,
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720, 732, 795, 864, 0, 576, 580, 586, 625, 0,
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DRM_MODE_FLAG_INTERLACE),
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.vrefresh = 50,
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.picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3,
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},
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},
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{ /* NTSC */
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.enci = &meson_cvbs_enci_ntsc,
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.mode = {
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DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500,
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720, 739, 801, 858, 0, 480, 488, 494, 525, 0,
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DRM_MODE_FLAG_INTERLACE),
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.vrefresh = 60,
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.picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3,
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},
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},
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};
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/* Connector */
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static void meson_cvbs_connector_destroy(struct drm_connector *connector)
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{
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drm_connector_cleanup(connector);
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}
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static enum drm_connector_status
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meson_cvbs_connector_detect(struct drm_connector *connector, bool force)
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{
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/* FIXME: Add load-detect or jack-detect if possible */
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return connector_status_connected;
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}
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static int meson_cvbs_connector_get_modes(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct drm_display_mode *mode;
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int i;
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for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
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struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
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mode = drm_mode_duplicate(dev, &meson_mode->mode);
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if (!mode) {
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DRM_ERROR("Failed to create a new display mode\n");
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return 0;
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}
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drm_mode_probed_add(connector, mode);
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}
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return i;
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}
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static int meson_cvbs_connector_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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/* Validate the modes added in get_modes */
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return MODE_OK;
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}
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static const struct drm_connector_funcs meson_cvbs_connector_funcs = {
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.dpms = drm_atomic_helper_connector_dpms,
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.detect = meson_cvbs_connector_detect,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = meson_cvbs_connector_destroy,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static const
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struct drm_connector_helper_funcs meson_cvbs_connector_helper_funcs = {
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.get_modes = meson_cvbs_connector_get_modes,
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.mode_valid = meson_cvbs_connector_mode_valid,
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};
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/* Encoder */
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static void meson_venc_cvbs_encoder_destroy(struct drm_encoder *encoder)
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{
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drm_encoder_cleanup(encoder);
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}
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static const struct drm_encoder_funcs meson_venc_cvbs_encoder_funcs = {
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.destroy = meson_venc_cvbs_encoder_destroy,
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};
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static int meson_venc_cvbs_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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int i;
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for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
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struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
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if (drm_mode_equal(&crtc_state->mode, &meson_mode->mode))
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return 0;
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}
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return -EINVAL;
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}
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static void meson_venc_cvbs_encoder_disable(struct drm_encoder *encoder)
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{
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struct meson_venc_cvbs *meson_venc_cvbs =
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encoder_to_meson_venc_cvbs(encoder);
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struct meson_drm *priv = meson_venc_cvbs->priv;
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/* Disable CVBS VDAC */
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regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0);
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regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8);
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}
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static void meson_venc_cvbs_encoder_enable(struct drm_encoder *encoder)
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{
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struct meson_venc_cvbs *meson_venc_cvbs =
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encoder_to_meson_venc_cvbs(encoder);
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struct meson_drm *priv = meson_venc_cvbs->priv;
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/* VDAC0 source is not from ATV */
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writel_bits_relaxed(BIT(5), 0, priv->io_base + _REG(VENC_VDAC_DACSEL0));
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if (meson_vpu_is_compatible(priv, "amlogic,meson-gxbb-vpu"))
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regmap_write(priv->hhi, HHI_VDAC_CNTL0, 1);
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else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") ||
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meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu"))
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regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0xf0001);
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regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0);
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}
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static void meson_venc_cvbs_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct meson_venc_cvbs *meson_venc_cvbs =
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encoder_to_meson_venc_cvbs(encoder);
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int i;
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for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
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struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
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if (drm_mode_equal(mode, &meson_mode->mode)) {
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meson_venci_cvbs_mode_set(meson_venc_cvbs->priv,
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meson_mode->enci);
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break;
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}
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}
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}
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static const struct drm_encoder_helper_funcs
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meson_venc_cvbs_encoder_helper_funcs = {
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.atomic_check = meson_venc_cvbs_encoder_atomic_check,
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.disable = meson_venc_cvbs_encoder_disable,
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.enable = meson_venc_cvbs_encoder_enable,
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.mode_set = meson_venc_cvbs_encoder_mode_set,
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};
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static bool meson_venc_cvbs_connector_is_available(struct meson_drm *priv)
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{
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struct device_node *ep, *remote;
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/* CVBS VDAC output is on the first port, first endpoint */
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ep = of_graph_get_endpoint_by_regs(priv->dev->of_node, 0, 0);
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if (!ep)
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return false;
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/* If the endpoint node exists, consider it enabled */
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remote = of_graph_get_remote_port(ep);
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if (remote) {
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of_node_put(ep);
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return true;
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}
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of_node_put(ep);
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of_node_put(remote);
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return false;
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}
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int meson_venc_cvbs_create(struct meson_drm *priv)
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{
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struct drm_device *drm = priv->drm;
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struct meson_venc_cvbs *meson_venc_cvbs;
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struct drm_connector *connector;
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struct drm_encoder *encoder;
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int ret;
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if (!meson_venc_cvbs_connector_is_available(priv)) {
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dev_info(drm->dev, "CVBS Output connector not available\n");
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return -ENODEV;
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}
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meson_venc_cvbs = devm_kzalloc(priv->dev, sizeof(*meson_venc_cvbs),
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GFP_KERNEL);
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if (!meson_venc_cvbs)
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return -ENOMEM;
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meson_venc_cvbs->priv = priv;
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encoder = &meson_venc_cvbs->encoder;
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connector = &meson_venc_cvbs->connector;
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/* Connector */
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drm_connector_helper_add(connector,
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&meson_cvbs_connector_helper_funcs);
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ret = drm_connector_init(drm, connector, &meson_cvbs_connector_funcs,
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DRM_MODE_CONNECTOR_Composite);
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if (ret) {
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dev_err(priv->dev, "Failed to init CVBS connector\n");
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return ret;
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}
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connector->interlace_allowed = 1;
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/* Encoder */
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drm_encoder_helper_add(encoder, &meson_venc_cvbs_encoder_helper_funcs);
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ret = drm_encoder_init(drm, encoder, &meson_venc_cvbs_encoder_funcs,
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DRM_MODE_ENCODER_TVDAC, "meson_venc_cvbs");
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if (ret) {
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dev_err(priv->dev, "Failed to init CVBS encoder\n");
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return ret;
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}
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encoder->possible_crtcs = BIT(0);
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drm_mode_connector_attach_encoder(connector, encoder);
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return 0;
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}
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