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-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAT3NKzROxKuMESys7AQKElw/+JyDxJSlj+g+nymkx8IVVuU8CsEwNLgRk 8KEnRfLhGtkXFLSJYWO6jzGo16F8Uqli1PdMFte/wagSv0285/HZaKlkkBVHdJ/m u40oSjgT013bBh6MQ0Oaf8pFezFUiQB5zPOA9QGaLVGDLXCmgqUgd7exaD5wRIwB ZmyItjZeAVnDfk1R+ZiNYytHAi8A5wSB+eFDCIQYgyulA1Igd1UnRtx+dRKbvc/m rWQ6KWbZHIdvP1ksd8wHHkrlUD2pEeJ8glJLsZUhMm/5oMf/8RmOCvmo8rvE/qwl eDQ1h4cGYlfjobxXZMHqAN9m7Jg2bI946HZjdb7/7oCeO6VW3FwPZ/Ic75p+wp45 HXJTItufERYk6QxShiOKvA+QexnYwY0IT5oRP4DrhdVB/X9cl2MoaZHC+RbYLQy+ /5VNZKi38iK4F9AbFamS7kd0i5QszA/ZzEzKZ6VMuOp3W/fagpn4ZJT1LIA3m4A9 Q0cj24mqeyCfjysu0TMbPtaN+Yjeu1o1OFRvM8XffbZsp5bNzuTDEvviJ2NXw4vK 4qUHulhYSEWcu9YgAZXvEWDEM78FXCkg2v/CrZXH5tyc95kUkMPcgG+QZBB5wElR FaOKpiC/BuNIGEf02IZQ4nfDxE90QwnDeoYeV+FvNj9UEOopJ5z5bMPoTHxm4cCD NypQthI85pc= =G9mT -----END PGP SIGNATURE----- Merge tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system Pull "Disintegrate and delete asm/system.h" from David Howells: "Here are a bunch of patches to disintegrate asm/system.h into a set of separate bits to relieve the problem of circular inclusion dependencies. I've built all the working defconfigs from all the arches that I can and made sure that they don't break. The reason for these patches is that I recently encountered a circular dependency problem that came about when I produced some patches to optimise get_order() by rewriting it to use ilog2(). This uses bitops - and on the SH arch asm/bitops.h drags in asm-generic/get_order.h by a circuituous route involving asm/system.h. The main difficulty seems to be asm/system.h. It holds a number of low level bits with no/few dependencies that are commonly used (eg. memory barriers) and a number of bits with more dependencies that aren't used in many places (eg. switch_to()). These patches break asm/system.h up into the following core pieces: (1) asm/barrier.h Move memory barriers here. This already done for MIPS and Alpha. (2) asm/switch_to.h Move switch_to() and related stuff here. (3) asm/exec.h Move arch_align_stack() here. Other process execution related bits could perhaps go here from asm/processor.h. (4) asm/cmpxchg.h Move xchg() and cmpxchg() here as they're full word atomic ops and frequently used by atomic_xchg() and atomic_cmpxchg(). (5) asm/bug.h Move die() and related bits. (6) asm/auxvec.h Move AT_VECTOR_SIZE_ARCH here. Other arch headers are created as needed on a per-arch basis." Fixed up some conflicts from other header file cleanups and moving code around that has happened in the meantime, so David's testing is somewhat weakened by that. We'll find out anything that got broken and fix it.. * tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits) Delete all instances of asm/system.h Remove all #inclusions of asm/system.h Add #includes needed to permit the removal of asm/system.h Move all declarations of free_initmem() to linux/mm.h Disintegrate asm/system.h for OpenRISC Split arch_align_stack() out from asm-generic/system.h Split the switch_to() wrapper out of asm-generic/system.h Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h Create asm-generic/barrier.h Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h Disintegrate asm/system.h for Xtensa Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt] Disintegrate asm/system.h for Tile Disintegrate asm/system.h for Sparc Disintegrate asm/system.h for SH Disintegrate asm/system.h for Score Disintegrate asm/system.h for S390 Disintegrate asm/system.h for PowerPC Disintegrate asm/system.h for PA-RISC Disintegrate asm/system.h for MN10300 ...
451 lines
10 KiB
C
451 lines
10 KiB
C
/*
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* linux/arch/arm/mach-sa1100/generic.c
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*
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* Author: Nicolas Pitre
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*
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* Code common to all SA11x0 machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm.h>
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#include <linux/cpufreq.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <video/sa1100fb.h>
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#include <asm/div64.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include <asm/irq.h>
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#include <asm/system_misc.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include "generic.h"
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unsigned int reset_status;
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EXPORT_SYMBOL(reset_status);
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#define NR_FREQS 16
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/*
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* This table is setup for a 3.6864MHz Crystal.
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*/
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static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
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590, /* 59.0 MHz */
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737, /* 73.7 MHz */
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885, /* 88.5 MHz */
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1032, /* 103.2 MHz */
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1180, /* 118.0 MHz */
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1327, /* 132.7 MHz */
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1475, /* 147.5 MHz */
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1622, /* 162.2 MHz */
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1769, /* 176.9 MHz */
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1917, /* 191.7 MHz */
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2064, /* 206.4 MHz */
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2212, /* 221.2 MHz */
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2359, /* 235.9 MHz */
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2507, /* 250.7 MHz */
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2654, /* 265.4 MHz */
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2802 /* 280.2 MHz */
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};
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/* rounds up(!) */
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unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
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{
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int i;
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khz /= 100;
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for (i = 0; i < NR_FREQS; i++)
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if (cclk_frequency_100khz[i] >= khz)
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break;
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return i;
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}
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unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
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{
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unsigned int freq = 0;
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if (idx < NR_FREQS)
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freq = cclk_frequency_100khz[idx] * 100;
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return freq;
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}
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/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
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* this platform, anyway.
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*/
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int sa11x0_verify_speed(struct cpufreq_policy *policy)
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{
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unsigned int tmp;
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if (policy->cpu)
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return -EINVAL;
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cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
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/* make sure that at least one frequency is within the policy */
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tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
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if (tmp > policy->max)
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policy->max = tmp;
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cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
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return 0;
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}
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unsigned int sa11x0_getspeed(unsigned int cpu)
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{
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if (cpu)
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return 0;
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return cclk_frequency_100khz[PPCR & 0xf] * 100;
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}
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/*
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* Default power-off for SA1100
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*/
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static void sa1100_power_off(void)
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{
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mdelay(100);
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local_irq_disable();
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/* disable internal oscillator, float CS lines */
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PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
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/* enable wake-up on GPIO0 (Assabet...) */
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PWER = GFER = GRER = 1;
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/*
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* set scratchpad to zero, just in case it is used as a
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* restart address by the bootloader.
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*/
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PSPR = 0;
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/* enter sleep mode */
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PMCR = PMCR_SF;
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}
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void sa11x0_restart(char mode, const char *cmd)
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{
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if (mode == 's') {
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/* Jump into ROM at address 0 */
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soft_restart(0);
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} else {
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/* Use on-chip reset capability */
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RSRR = RSRR_SWR;
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}
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}
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static void sa11x0_register_device(struct platform_device *dev, void *data)
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{
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int err;
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dev->dev.platform_data = data;
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err = platform_device_register(dev);
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if (err)
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printk(KERN_ERR "Unable to register device %s: %d\n",
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dev->name, err);
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}
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static struct resource sa11x0udc_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
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};
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static u64 sa11x0udc_dma_mask = 0xffffffffUL;
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static struct platform_device sa11x0udc_device = {
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.name = "sa11x0-udc",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0udc_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0udc_resources),
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.resource = sa11x0udc_resources,
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};
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static struct resource sa11x0uart1_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
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};
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static struct platform_device sa11x0uart1_device = {
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.name = "sa11x0-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(sa11x0uart1_resources),
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.resource = sa11x0uart1_resources,
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};
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static struct resource sa11x0uart3_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
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};
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static struct platform_device sa11x0uart3_device = {
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.name = "sa11x0-uart",
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.id = 3,
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.num_resources = ARRAY_SIZE(sa11x0uart3_resources),
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.resource = sa11x0uart3_resources,
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};
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static struct resource sa11x0mcp_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
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[1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
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[2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
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};
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static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
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static struct platform_device sa11x0mcp_device = {
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.name = "sa11x0-mcp",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0mcp_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0mcp_resources),
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.resource = sa11x0mcp_resources,
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};
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void __init sa11x0_ppc_configure_mcp(void)
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{
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/* Setup the PPC unit for the MCP */
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PPDR &= ~PPC_RXD4;
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PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
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PSDR |= PPC_RXD4;
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PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
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PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
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}
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void sa11x0_register_mcp(struct mcp_plat_data *data)
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{
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sa11x0_register_device(&sa11x0mcp_device, data);
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}
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static struct resource sa11x0ssp_resources[] = {
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[0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
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};
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static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
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static struct platform_device sa11x0ssp_device = {
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.name = "sa11x0-ssp",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0ssp_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0ssp_resources),
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.resource = sa11x0ssp_resources,
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};
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static struct resource sa11x0fb_resources[] = {
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[0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_LCD),
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};
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static struct platform_device sa11x0fb_device = {
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.name = "sa11x0-fb",
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.id = -1,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0fb_resources),
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.resource = sa11x0fb_resources,
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};
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void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
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{
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sa11x0_register_device(&sa11x0fb_device, inf);
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}
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static struct platform_device sa11x0pcmcia_device = {
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.name = "sa11x0-pcmcia",
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.id = -1,
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};
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static struct platform_device sa11x0mtd_device = {
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.name = "sa1100-mtd",
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.id = -1,
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};
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void sa11x0_register_mtd(struct flash_platform_data *flash,
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struct resource *res, int nr)
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{
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flash->name = "sa1100";
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sa11x0mtd_device.resource = res;
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sa11x0mtd_device.num_resources = nr;
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sa11x0_register_device(&sa11x0mtd_device, flash);
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}
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static struct resource sa11x0ir_resources[] = {
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DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
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DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
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DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
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DEFINE_RES_IRQ(IRQ_Ser2ICP),
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};
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static struct platform_device sa11x0ir_device = {
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.name = "sa11x0-ir",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa11x0ir_resources),
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.resource = sa11x0ir_resources,
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};
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void sa11x0_register_irda(struct irda_platform_data *irda)
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{
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sa11x0_register_device(&sa11x0ir_device, irda);
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}
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static struct resource sa1100_rtc_resources[] = {
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DEFINE_RES_MEM(0x90010000, 0x9001003f),
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DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
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DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
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};
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static struct platform_device sa11x0rtc_device = {
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.name = "sa1100-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa1100_rtc_resources),
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.resource = sa1100_rtc_resources,
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};
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static struct resource sa11x0dma_resources[] = {
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DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
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DEFINE_RES_IRQ(IRQ_DMA0),
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DEFINE_RES_IRQ(IRQ_DMA1),
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DEFINE_RES_IRQ(IRQ_DMA2),
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DEFINE_RES_IRQ(IRQ_DMA3),
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DEFINE_RES_IRQ(IRQ_DMA4),
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DEFINE_RES_IRQ(IRQ_DMA5),
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};
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static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device sa11x0dma_device = {
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.name = "sa11x0-dma",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0dma_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0dma_resources),
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.resource = sa11x0dma_resources,
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};
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static struct platform_device *sa11x0_devices[] __initdata = {
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&sa11x0udc_device,
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&sa11x0uart1_device,
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&sa11x0uart3_device,
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&sa11x0ssp_device,
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&sa11x0pcmcia_device,
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&sa11x0rtc_device,
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&sa11x0dma_device,
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};
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static int __init sa1100_init(void)
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{
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pm_power_off = sa1100_power_off;
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return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
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}
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arch_initcall(sa1100_init);
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/*
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* Common I/O mapping:
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*
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* Typically, static virtual address mappings are as follow:
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*
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* 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
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* 0xf4000000-0xf4ffffff: SA-1111
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* 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
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* 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
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* 0xffff0000-0xffff0fff: SA1100 exception vectors
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* 0xffff2000-0xffff2fff: Minicache copy_user_page area
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*
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* Below 0xe8000000 is reserved for vm allocation.
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*
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* The machine specific code must provide the extra mapping beside the
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* default mapping provided here.
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*/
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static struct map_desc standard_io_desc[] __initdata = {
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{ /* PCM */
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.virtual = 0xf8000000,
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.pfn = __phys_to_pfn(0x80000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* SCM */
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.virtual = 0xfa000000,
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.pfn = __phys_to_pfn(0x90000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* MER */
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.virtual = 0xfc000000,
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.pfn = __phys_to_pfn(0xa0000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* LCD + DMA */
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.virtual = 0xfe000000,
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.pfn = __phys_to_pfn(0xb0000000),
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.length = 0x00200000,
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.type = MT_DEVICE
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},
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};
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void __init sa1100_map_io(void)
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{
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iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
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}
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/*
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* Disable the memory bus request/grant signals on the SA1110 to
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* ensure that we don't receive spurious memory requests. We set
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* the MBGNT signal false to ensure the SA1111 doesn't own the
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* SDRAM bus.
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*/
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void sa1110_mb_disable(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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PGSR &= ~GPIO_MBGNT;
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GPCR = GPIO_MBGNT;
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GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
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GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
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local_irq_restore(flags);
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}
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/*
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* If the system is going to use the SA-1111 DMA engines, set up
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* the memory bus request/grant pins.
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*/
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void sa1110_mb_enable(void)
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{
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unsigned long flags;
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|
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local_irq_save(flags);
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PGSR &= ~GPIO_MBGNT;
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GPCR = GPIO_MBGNT;
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GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
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GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
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TUCR |= TUCR_MR;
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local_irq_restore(flags);
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}
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