118 lines
2.6 KiB
Plaintext
118 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree Include file for Freescale Layerscape-1046A family SoC.
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*
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* Copyright 2019 NXP.
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*
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*/
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#include "fsl-ls1046a-frwy-sdk.dts"
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&soc {
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bp7: buffer-pool@7 {
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compatible = "fsl,ls1046a-bpool", "fsl,bpool";
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fsl,bpid = <7>;
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fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
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fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
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dma-coherent;
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};
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bp8: buffer-pool@8 {
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compatible = "fsl,ls1046a-bpool", "fsl,bpool";
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fsl,bpid = <8>;
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fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
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fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
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dma-coherent;
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};
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bp9: buffer-pool@9 {
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compatible = "fsl,ls1046a-bpool", "fsl,bpool";
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fsl,bpid = <9>;
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fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
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fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
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dma-coherent;
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};
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fsl,dpaa {
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compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
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dma-coherent;
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ethernet@0 {
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compatible = "fsl,dpa-ethernet-init";
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fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
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fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
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fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
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};
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ethernet@4 {
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compatible = "fsl,dpa-ethernet-init";
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fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
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fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
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fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
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};
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ethernet@5 {
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compatible = "fsl,dpa-ethernet-init";
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fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
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fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
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fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
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};
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ethernet@9 {
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compatible = "fsl,dpa-ethernet-init";
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fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
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fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
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fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
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};
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dpa-fman0-oh@2 {
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compatible = "fsl,dpa-oh";
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/* Define frame queues for the OH port*/
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/* <OH Rx error, OH Rx default> */
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fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
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fsl,fman-oh-port = <&fman0_oh2>;
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};
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};
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pcie@3400000 {
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/delete-property/ iommu-map;
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};
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pcie@3500000 {
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/delete-property/ iommu-map;
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};
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pcie@3600000 {
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/delete-property/ iommu-map;
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};
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/delete-node/ iommu@9000000;
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};
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/ {
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* For legacy usdpaa based use-cases, update the size and
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alignment parameters. e.g. to allocate 256 MB memory:
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size = <0 0x10000000>;
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alignment = <0 0x10000000>;
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*/
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usdpaa_mem: usdpaa_mem {
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compatible = "fsl,usdpaa-mem";
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alloc-ranges = <0 0 0x10000 0>;
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size = <0 0x1000>;
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alignment = <0 0x1000>;
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};
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};
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};
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&fman0 {
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fman0_oh2: port@83000 {
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cell-index = <1>;
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compatible = "fsl,fman-port-oh";
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reg = <0x83000 0x1000>;
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};
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};
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