![Maya Nakamura](/assets/img/avatar_default.png)
Remove the five functions that are not used from the source and header files. Issue found by Coccinelle's semantic patch results for returnvar.cocci. Signed-off-by: Maya Nakamura <m.maya.nakamura@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
488 lines
11 KiB
C
488 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2016 Realtek Corporation.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALHWOUTSRC_H__
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#define __HALHWOUTSRC_H__
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/*--------------------------Define -------------------------------------------*/
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#define CCK_RSSI_INIT_COUNT 5
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#define RA_RSSI_STATE_INIT 0
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#define RA_RSSI_STATE_SEND 1
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#define RA_RSSI_STATE_HOLD 2
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#define CFO_HW_RPT_2_MHZ(val) ((val << 1) + (val >> 1))
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/* ((X* 3125) / 10)>>7 = (X*10)>>2 = X*2.5 = X<<1 + X>>1 */
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#define AGC_DIFF_CONFIG_MP(ic, band) \
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(odm_read_and_config_mp_##ic##_agc_tab_diff( \
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dm, array_mp_##ic##_agc_tab_diff_##band, \
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sizeof(array_mp_##ic##_agc_tab_diff_##band) / sizeof(u32)))
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#define AGC_DIFF_CONFIG_TC(ic, band) \
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(odm_read_and_config_tc_##ic##_agc_tab_diff( \
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dm, array_tc_##ic##_agc_tab_diff_##band, \
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sizeof(array_tc_##ic##_agc_tab_diff_##band) / sizeof(u32)))
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#define AGC_DIFF_CONFIG(ic, band) \
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do { \
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if (dm->is_mp_chip) \
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AGC_DIFF_CONFIG_MP(ic, band); \
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else \
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AGC_DIFF_CONFIG_TC(ic, band); \
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} while (0)
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/* ************************************************************
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* structure and define
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* *************************************************************/
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struct phy_rx_agc_info {
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 gain : 7, trsw : 1;
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#else
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u8 trsw : 1, gain : 7;
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#endif
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};
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struct phy_status_rpt_8192cd {
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struct phy_rx_agc_info path_agc[2];
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u8 ch_corr[2];
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u8 cck_sig_qual_ofdm_pwdb_all;
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u8 cck_agc_rpt_ofdm_cfosho_a;
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u8 cck_rpt_b_ofdm_cfosho_b;
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u8 rsvd_1; /*ch_corr_msb;*/
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u8 noise_power_db_msb;
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s8 path_cfotail[2];
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u8 pcts_mask[2];
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s8 stream_rxevm[2];
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u8 path_rxsnr[2];
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u8 noise_power_db_lsb;
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u8 rsvd_2[3];
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u8 stream_csi[2];
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u8 stream_target_csi[2];
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s8 sig_evm;
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u8 rsvd_3;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 antsel_rx_keep_2 : 1; /*ex_intf_flg:1;*/
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u8 sgi_en : 1;
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u8 rxsc : 2;
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u8 idle_long : 1;
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u8 r_ant_train_en : 1;
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u8 ant_sel_b : 1;
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u8 ant_sel : 1;
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#else /*_BIG_ENDIAN_ */
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u8 ant_sel : 1;
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u8 ant_sel_b : 1;
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u8 r_ant_train_en : 1;
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u8 idle_long : 1;
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u8 rxsc : 2;
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u8 sgi_en : 1;
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u8 antsel_rx_keep_2 : 1; /*ex_intf_flg:1;*/
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#endif
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};
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struct phy_status_rpt_8812 {
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/* DWORD 0*/
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u8 gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/
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u8 chl_num_LSB; /*channel number[7:0]*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 chl_num_MSB : 2; /*channel number[9:8]*/
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u8 sub_chnl : 4; /*sub-channel location[3:0]*/
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u8 r_RFMOD : 2; /*RF mode[1:0]*/
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#else /*_BIG_ENDIAN_ */
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u8 r_RFMOD : 2;
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u8 sub_chnl : 4;
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u8 chl_num_MSB : 2;
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#endif
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/* DWORD 1*/
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u8 pwdb_all; /*CCK signal quality / OFDM pwdb all*/
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s8 cfosho[2]; /*DW1 byte 1 DW1 byte2 */
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/*CCK AGC report and CCK_BB_Power / OFDM path-A and path-B short CFO*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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/*this should be checked again
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*because the definition of 8812 and 8814 is different
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*/
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u8 resvd_0 : 6;
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u8 bt_RF_ch_MSB : 2; /*8812A:2'b0, 8814A: bt rf channel keep[7:6]*/
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#else /*_BIG_ENDIAN_*/
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u8 bt_RF_ch_MSB : 2;
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u8 resvd_0 : 6;
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#endif
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/* DWORD 2*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 ant_div_sw_a : 1; /*8812A: ant_div_sw_a, 8814A: 1'b0*/
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u8 ant_div_sw_b : 1; /*8812A: ant_div_sw_b, 8814A: 1'b0*/
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u8 bt_RF_ch_LSB : 6; /*8812A: 6'b0, 8814A: bt rf channel keep[5:0]*/
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#else /*_BIG_ENDIAN_ */
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u8 bt_RF_ch_LSB : 6;
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u8 ant_div_sw_b : 1;
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u8 ant_div_sw_a : 1;
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#endif
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s8 cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/
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u8 PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/
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u8 PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/
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/* DWORD 3*/
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s8 rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/
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s8 rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/
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/* DWORD 4*/
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u8 PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 PCTS_MSK_RPT_3 : 6; /*PCTS mask report[29:24]*/
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u8 pcts_rpt_valid : 1; /*pcts_rpt_valid*/
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u8 resvd_1 : 1; /*1'b0*/
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#else /*_BIG_ENDIAN_*/
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u8 resvd_1 : 1;
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u8 pcts_rpt_valid : 1;
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u8 PCTS_MSK_RPT_3 : 6;
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#endif
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s8 rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 */
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/* 8812A: 16'b0, 8814A: stream 3 and stream 4 RX EVM*/
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/* DWORD 5*/
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u8 csi_current[2]; /*DW5 byte 1 DW5 byte 2 */
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/* 8812A: stream 1 and 2 CSI, 8814A: path-C and path-D RX SNR*/
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u8 gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 */
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/* path-C and path-D {TRSW, gain[6:0] }*/
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/* DWORD 6*/
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s8 sigevm; /*signal field EVM*/
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 antidx_antc : 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/
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u8 antidx_antd : 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/
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u8 dpdt_ctrl_keep : 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/
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u8 GNT_BT_keep : 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/
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#else /*_BIG_ENDIAN_*/
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u8 GNT_BT_keep : 1;
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u8 dpdt_ctrl_keep : 1;
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u8 antidx_antd : 3;
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u8 antidx_antc : 3;
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#endif
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 antidx_anta : 3; /*antidx_anta[2:0]*/
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u8 antidx_antb : 3; /*antidx_antb[2:0]*/
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u8 hw_antsw_occur : 2; /*1'b0*/
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#else /*_BIG_ENDIAN_*/
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u8 hw_antsw_occur : 2;
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u8 antidx_antb : 3;
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u8 antidx_anta : 3;
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#endif
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};
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void phydm_reset_rssi_for_dm(struct phy_dm_struct *dm, u8 station_id);
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void odm_init_rssi_for_dm(struct phy_dm_struct *dm);
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void odm_phy_status_query(struct phy_dm_struct *dm,
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struct dm_phy_status_info *phy_info, u8 *phy_status,
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struct dm_per_pkt_info *pktinfo);
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void odm_mac_status_query(struct phy_dm_struct *dm, u8 *mac_status, u8 mac_id,
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bool is_packet_match_bssid, bool is_packet_to_self,
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bool is_packet_beacon);
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enum hal_status
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odm_config_rf_with_tx_pwr_track_header_file(struct phy_dm_struct *dm);
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enum hal_status
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odm_config_rf_with_header_file(struct phy_dm_struct *dm,
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enum odm_rf_config_type config_type,
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enum odm_rf_radio_path e_rf_path);
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enum hal_status
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odm_config_bb_with_header_file(struct phy_dm_struct *dm,
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enum odm_bb_config_type config_type);
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enum hal_status odm_config_mac_with_header_file(struct phy_dm_struct *dm);
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enum hal_status
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odm_config_fw_with_header_file(struct phy_dm_struct *dm,
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enum odm_fw_config_type config_type,
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u8 *p_firmware, u32 *size);
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u32 odm_get_hw_img_version(struct phy_dm_struct *dm);
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/*For 8822B only!! need to move to FW finally */
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/*==============================================*/
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void phydm_rx_phy_status_new_type(struct phy_dm_struct *phydm, u8 *phy_status,
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struct dm_per_pkt_info *pktinfo,
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struct dm_phy_status_info *phy_info);
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bool phydm_query_is_mu_api(struct phy_dm_struct *phydm, u8 ppdu_idx,
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u8 *p_data_rate, u8 *p_gid);
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struct phy_status_rpt_jaguar2_type0 {
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/* DW0 */
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u8 page_num;
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u8 pwdb;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 gain : 6;
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u8 rsvd_0 : 1;
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u8 trsw : 1;
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#else
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u8 trsw : 1;
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u8 rsvd_0 : 1;
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u8 gain : 6;
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#endif
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u8 rsvd_1;
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/* DW1 */
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u8 rsvd_2;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 rxsc : 4;
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u8 agc_table : 4;
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#else
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u8 agc_table : 4;
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u8 rxsc : 4;
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#endif
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u8 channel;
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u8 band;
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/* DW2 */
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u16 length;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 antidx_a : 3;
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u8 antidx_b : 3;
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u8 rsvd_3 : 2;
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u8 antidx_c : 3;
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u8 antidx_d : 3;
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u8 rsvd_4 : 2;
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#else
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u8 rsvd_3 : 2;
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u8 antidx_b : 3;
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u8 antidx_a : 3;
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u8 rsvd_4 : 2;
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u8 antidx_d : 3;
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u8 antidx_c : 3;
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#endif
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/* DW3 */
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u8 signal_quality;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 vga : 5;
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u8 lna_l : 3;
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u8 bb_power : 6;
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u8 rsvd_9 : 1;
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u8 lna_h : 1;
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#else
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u8 lna_l : 3;
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u8 vga : 5;
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u8 lna_h : 1;
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u8 rsvd_9 : 1;
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u8 bb_power : 6;
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#endif
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u8 rsvd_5;
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/* DW4 */
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u32 rsvd_6;
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/* DW5 */
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u32 rsvd_7;
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/* DW6 */
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u32 rsvd_8;
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};
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struct phy_status_rpt_jaguar2_type1 {
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/* DW0 and DW1 */
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u8 page_num;
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u8 pwdb[4];
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 l_rxsc : 4;
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u8 ht_rxsc : 4;
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#else
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u8 ht_rxsc : 4;
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u8 l_rxsc : 4;
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#endif
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u8 channel;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 band : 2;
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u8 rsvd_0 : 1;
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u8 hw_antsw_occu : 1;
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u8 gnt_bt : 1;
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u8 ldpc : 1;
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u8 stbc : 1;
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u8 beamformed : 1;
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#else
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u8 beamformed : 1;
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u8 stbc : 1;
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u8 ldpc : 1;
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u8 gnt_bt : 1;
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u8 hw_antsw_occu : 1;
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u8 rsvd_0 : 1;
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u8 band : 2;
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#endif
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/* DW2 */
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u16 lsig_length;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 antidx_a : 3;
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u8 antidx_b : 3;
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u8 rsvd_1 : 2;
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u8 antidx_c : 3;
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u8 antidx_d : 3;
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u8 rsvd_2 : 2;
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#else
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u8 rsvd_1 : 2;
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u8 antidx_b : 3;
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u8 antidx_a : 3;
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u8 rsvd_2 : 2;
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u8 antidx_d : 3;
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u8 antidx_c : 3;
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#endif
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/* DW3 */
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u8 paid;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 paid_msb : 1;
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u8 gid : 6;
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u8 rsvd_3 : 1;
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#else
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u8 rsvd_3 : 1;
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u8 gid : 6;
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u8 paid_msb : 1;
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#endif
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u8 intf_pos;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 intf_pos_msb : 1;
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u8 rsvd_4 : 2;
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u8 nb_intf_flag : 1;
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u8 rf_mode : 2;
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u8 rsvd_5 : 2;
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#else
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u8 rsvd_5 : 2;
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u8 rf_mode : 2;
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u8 nb_intf_flag : 1;
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u8 rsvd_4 : 2;
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u8 intf_pos_msb : 1;
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#endif
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/* DW4 */
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s8 rxevm[4]; /* s(8,1) */
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/* DW5 */
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s8 cfo_tail[4]; /* s(8,7) */
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/* DW6 */
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s8 rxsnr[4]; /* s(8,1) */
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};
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struct phy_status_rpt_jaguar2_type2 {
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/* DW0 ane DW1 */
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u8 page_num;
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u8 pwdb[4];
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 l_rxsc : 4;
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u8 ht_rxsc : 4;
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#else
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u8 ht_rxsc : 4;
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u8 l_rxsc : 4;
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#endif
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u8 channel;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 band : 2;
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u8 rsvd_0 : 1;
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u8 hw_antsw_occu : 1;
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u8 gnt_bt : 1;
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u8 ldpc : 1;
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u8 stbc : 1;
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u8 beamformed : 1;
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#else
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u8 beamformed : 1;
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u8 stbc : 1;
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u8 ldpc : 1;
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u8 gnt_bt : 1;
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u8 hw_antsw_occu : 1;
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u8 rsvd_0 : 1;
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u8 band : 2;
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#endif
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/* DW2 */
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 shift_l_map : 6;
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u8 rsvd_1 : 2;
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#else
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u8 rsvd_1 : 2;
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u8 shift_l_map : 6;
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#endif
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u8 cnt_pw2cca;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 agc_table_a : 4;
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u8 agc_table_b : 4;
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u8 agc_table_c : 4;
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u8 agc_table_d : 4;
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#else
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u8 agc_table_b : 4;
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u8 agc_table_a : 4;
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u8 agc_table_d : 4;
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u8 agc_table_c : 4;
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#endif
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/* DW3 ~ DW6*/
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u8 cnt_cca2agc_rdy;
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 gain_a : 6;
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u8 rsvd_2 : 1;
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u8 trsw_a : 1;
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u8 gain_b : 6;
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u8 rsvd_3 : 1;
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u8 trsw_b : 1;
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u8 gain_c : 6;
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u8 rsvd_4 : 1;
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u8 trsw_c : 1;
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u8 gain_d : 6;
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u8 rsvd_5 : 1;
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u8 trsw_d : 1;
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u8 aagc_step_a : 2;
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u8 aagc_step_b : 2;
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u8 aagc_step_c : 2;
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u8 aagc_step_d : 2;
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#else
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u8 trsw_a : 1;
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u8 rsvd_2 : 1;
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u8 gain_a : 6;
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u8 trsw_b : 1;
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u8 rsvd_3 : 1;
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u8 gain_b : 6;
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u8 trsw_c : 1;
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u8 rsvd_4 : 1;
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u8 gain_c : 6;
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u8 trsw_d : 1;
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u8 rsvd_5 : 1;
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u8 gain_d : 6;
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u8 aagc_step_d : 2;
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u8 aagc_step_c : 2;
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u8 aagc_step_b : 2;
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u8 aagc_step_a : 2;
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#endif
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u8 ht_aagc_gain[4];
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u8 dagc_gain[4];
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#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
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u8 counter : 6;
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u8 rsvd_6 : 2;
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u8 syn_count : 5;
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u8 rsvd_7 : 3;
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#else
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u8 rsvd_6 : 2;
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u8 counter : 6;
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u8 rsvd_7 : 3;
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u8 syn_count : 5;
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#endif
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|
};
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#endif /*#ifndef __HALHWOUTSRC_H__*/
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