![Jon Mason](/assets/img/avatar_default.png)
64bit BAR sizes are permissible with an NTB device. To support them various modifications and clean-ups were required, most significantly using 2 32bit scratch pad registers for each BAR. Also, modify the driver to allow more than 2 Memory Windows. Signed-off-by: Jon Mason <jon.mason@intel.com>
1142 lines
29 KiB
C
1142 lines
29 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2012 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2012 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copy
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Intel PCIe NTB Linux driver
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*
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* Contact Information:
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* Jon Mason <jon.mason@intel.com>
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*/
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#include <linux/debugfs.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include "ntb_hw.h"
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#include "ntb_regs.h"
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#define NTB_NAME "Intel(R) PCI-E Non-Transparent Bridge Driver"
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#define NTB_VER "0.25"
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MODULE_DESCRIPTION(NTB_NAME);
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MODULE_VERSION(NTB_VER);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR("Intel Corporation");
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enum {
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NTB_CONN_CLASSIC = 0,
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NTB_CONN_B2B,
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NTB_CONN_RP,
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};
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enum {
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NTB_DEV_USD = 0,
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NTB_DEV_DSD,
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};
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enum {
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SNB_HW = 0,
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BWD_HW,
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};
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/* Translate memory window 0,1 to BAR 2,4 */
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#define MW_TO_BAR(mw) (mw * 2 + 2)
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static DEFINE_PCI_DEVICE_TABLE(ntb_pci_tbl) = {
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_BWD)},
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_JSF)},
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF)},
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_RP_JSF)},
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_RP_SNB)},
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_SNB)},
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{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB)},
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{0}
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};
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MODULE_DEVICE_TABLE(pci, ntb_pci_tbl);
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/**
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* ntb_register_event_callback() - register event callback
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* @ndev: pointer to ntb_device instance
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* @func: callback function to register
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*
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* This function registers a callback for any HW driver events such as link
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* up/down, power management notices and etc.
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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int ntb_register_event_callback(struct ntb_device *ndev,
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void (*func)(void *handle, enum ntb_hw_event event))
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{
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if (ndev->event_cb)
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return -EINVAL;
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ndev->event_cb = func;
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return 0;
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}
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/**
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* ntb_unregister_event_callback() - unregisters the event callback
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* @ndev: pointer to ntb_device instance
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*
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* This function unregisters the existing callback from transport
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*/
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void ntb_unregister_event_callback(struct ntb_device *ndev)
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{
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ndev->event_cb = NULL;
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}
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/**
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* ntb_register_db_callback() - register a callback for doorbell interrupt
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* @ndev: pointer to ntb_device instance
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* @idx: doorbell index to register callback, zero based
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* @func: callback function to register
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*
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* This function registers a callback function for the doorbell interrupt
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* on the primary side. The function will unmask the doorbell as well to
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* allow interrupt.
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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int ntb_register_db_callback(struct ntb_device *ndev, unsigned int idx,
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void *data, void (*func)(void *data, int db_num))
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{
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unsigned long mask;
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if (idx >= ndev->max_cbs || ndev->db_cb[idx].callback) {
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dev_warn(&ndev->pdev->dev, "Invalid Index.\n");
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return -EINVAL;
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}
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ndev->db_cb[idx].callback = func;
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ndev->db_cb[idx].data = data;
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/* unmask interrupt */
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mask = readw(ndev->reg_ofs.pdb_mask);
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clear_bit(idx * ndev->bits_per_vector, &mask);
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writew(mask, ndev->reg_ofs.pdb_mask);
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return 0;
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}
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/**
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* ntb_unregister_db_callback() - unregister a callback for doorbell interrupt
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* @ndev: pointer to ntb_device instance
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* @idx: doorbell index to register callback, zero based
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*
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* This function unregisters a callback function for the doorbell interrupt
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* on the primary side. The function will also mask the said doorbell.
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*/
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void ntb_unregister_db_callback(struct ntb_device *ndev, unsigned int idx)
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{
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unsigned long mask;
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if (idx >= ndev->max_cbs || !ndev->db_cb[idx].callback)
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return;
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mask = readw(ndev->reg_ofs.pdb_mask);
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set_bit(idx * ndev->bits_per_vector, &mask);
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writew(mask, ndev->reg_ofs.pdb_mask);
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ndev->db_cb[idx].callback = NULL;
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}
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/**
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* ntb_find_transport() - find the transport pointer
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* @transport: pointer to pci device
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*
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* Given the pci device pointer, return the transport pointer passed in when
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* the transport attached when it was inited.
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*
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* RETURNS: pointer to transport.
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*/
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void *ntb_find_transport(struct pci_dev *pdev)
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{
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struct ntb_device *ndev = pci_get_drvdata(pdev);
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return ndev->ntb_transport;
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}
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/**
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* ntb_register_transport() - Register NTB transport with NTB HW driver
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* @transport: transport identifier
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*
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* This function allows a transport to reserve the hardware driver for
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* NTB usage.
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*
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* RETURNS: pointer to ntb_device, NULL on error.
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*/
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struct ntb_device *ntb_register_transport(struct pci_dev *pdev, void *transport)
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{
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struct ntb_device *ndev = pci_get_drvdata(pdev);
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if (ndev->ntb_transport)
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return NULL;
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ndev->ntb_transport = transport;
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return ndev;
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}
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/**
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* ntb_unregister_transport() - Unregister the transport with the NTB HW driver
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* @ndev - ntb_device of the transport to be freed
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*
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* This function unregisters the transport from the HW driver and performs any
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* necessary cleanups.
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*/
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void ntb_unregister_transport(struct ntb_device *ndev)
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{
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int i;
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if (!ndev->ntb_transport)
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return;
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for (i = 0; i < ndev->max_cbs; i++)
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ntb_unregister_db_callback(ndev, i);
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ntb_unregister_event_callback(ndev);
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ndev->ntb_transport = NULL;
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}
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/**
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* ntb_write_local_spad() - write to the secondary scratchpad register
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* @ndev: pointer to ntb_device instance
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* @idx: index to the scratchpad register, 0 based
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* @val: the data value to put into the register
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*
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* This function allows writing of a 32bit value to the indexed scratchpad
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* register. This writes over the data mirrored to the local scratchpad register
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* by the remote system.
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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int ntb_write_local_spad(struct ntb_device *ndev, unsigned int idx, u32 val)
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{
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if (idx >= ndev->limits.max_spads)
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return -EINVAL;
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dev_dbg(&ndev->pdev->dev, "Writing %x to local scratch pad index %d\n",
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val, idx);
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writel(val, ndev->reg_ofs.spad_read + idx * 4);
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return 0;
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}
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/**
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* ntb_read_local_spad() - read from the primary scratchpad register
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* @ndev: pointer to ntb_device instance
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* @idx: index to scratchpad register, 0 based
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* @val: pointer to 32bit integer for storing the register value
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*
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* This function allows reading of the 32bit scratchpad register on
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* the primary (internal) side. This allows the local system to read data
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* written and mirrored to the scratchpad register by the remote system.
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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int ntb_read_local_spad(struct ntb_device *ndev, unsigned int idx, u32 *val)
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{
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if (idx >= ndev->limits.max_spads)
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return -EINVAL;
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*val = readl(ndev->reg_ofs.spad_write + idx * 4);
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dev_dbg(&ndev->pdev->dev,
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"Reading %x from local scratch pad index %d\n", *val, idx);
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return 0;
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}
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/**
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* ntb_write_remote_spad() - write to the secondary scratchpad register
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* @ndev: pointer to ntb_device instance
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* @idx: index to the scratchpad register, 0 based
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* @val: the data value to put into the register
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*
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* This function allows writing of a 32bit value to the indexed scratchpad
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* register. The register resides on the secondary (external) side. This allows
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* the local system to write data to be mirrored to the remote systems
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* scratchpad register.
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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int ntb_write_remote_spad(struct ntb_device *ndev, unsigned int idx, u32 val)
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{
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if (idx >= ndev->limits.max_spads)
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return -EINVAL;
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dev_dbg(&ndev->pdev->dev, "Writing %x to remote scratch pad index %d\n",
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val, idx);
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writel(val, ndev->reg_ofs.spad_write + idx * 4);
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return 0;
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}
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/**
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* ntb_read_remote_spad() - read from the primary scratchpad register
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* @ndev: pointer to ntb_device instance
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* @idx: index to scratchpad register, 0 based
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* @val: pointer to 32bit integer for storing the register value
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*
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* This function allows reading of the 32bit scratchpad register on
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* the primary (internal) side. This alloows the local system to read the data
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* it wrote to be mirrored on the remote system.
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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int ntb_read_remote_spad(struct ntb_device *ndev, unsigned int idx, u32 *val)
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{
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if (idx >= ndev->limits.max_spads)
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return -EINVAL;
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*val = readl(ndev->reg_ofs.spad_read + idx * 4);
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dev_dbg(&ndev->pdev->dev,
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"Reading %x from remote scratch pad index %d\n", *val, idx);
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return 0;
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}
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/**
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* ntb_get_mw_vbase() - get virtual addr for the NTB memory window
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* @ndev: pointer to ntb_device instance
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* @mw: memory window number
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*
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* This function provides the base virtual address of the memory window
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* specified.
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*
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* RETURNS: pointer to virtual address, or NULL on error.
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*/
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void __iomem *ntb_get_mw_vbase(struct ntb_device *ndev, unsigned int mw)
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{
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if (mw >= NTB_NUM_MW)
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return NULL;
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return ndev->mw[mw].vbase;
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}
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/**
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* ntb_get_mw_size() - return size of NTB memory window
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* @ndev: pointer to ntb_device instance
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* @mw: memory window number
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*
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* This function provides the physical size of the memory window specified
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*
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* RETURNS: the size of the memory window or zero on error
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*/
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resource_size_t ntb_get_mw_size(struct ntb_device *ndev, unsigned int mw)
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{
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if (mw >= NTB_NUM_MW)
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return 0;
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return ndev->mw[mw].bar_sz;
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}
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/**
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* ntb_set_mw_addr - set the memory window address
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* @ndev: pointer to ntb_device instance
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* @mw: memory window number
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* @addr: base address for data
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*
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* This function sets the base physical address of the memory window. This
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* memory address is where data from the remote system will be transfered into
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* or out of depending on how the transport is configured.
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*/
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void ntb_set_mw_addr(struct ntb_device *ndev, unsigned int mw, u64 addr)
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{
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if (mw >= NTB_NUM_MW)
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return;
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dev_dbg(&ndev->pdev->dev, "Writing addr %Lx to BAR %d\n", addr,
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MW_TO_BAR(mw));
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ndev->mw[mw].phys_addr = addr;
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switch (MW_TO_BAR(mw)) {
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case NTB_BAR_23:
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writeq(addr, ndev->reg_ofs.sbar2_xlat);
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break;
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case NTB_BAR_45:
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writeq(addr, ndev->reg_ofs.sbar4_xlat);
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break;
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}
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}
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/**
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* ntb_ring_sdb() - Set the doorbell on the secondary/external side
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* @ndev: pointer to ntb_device instance
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* @db: doorbell to ring
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*
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* This function allows triggering of a doorbell on the secondary/external
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* side that will initiate an interrupt on the remote host
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*
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* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
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*/
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void ntb_ring_sdb(struct ntb_device *ndev, unsigned int db)
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{
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dev_dbg(&ndev->pdev->dev, "%s: ringing doorbell %d\n", __func__, db);
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if (ndev->hw_type == BWD_HW)
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writeq((u64) 1 << db, ndev->reg_ofs.sdb);
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else
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writew(((1 << ndev->bits_per_vector) - 1) <<
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(db * ndev->bits_per_vector), ndev->reg_ofs.sdb);
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}
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static void ntb_link_event(struct ntb_device *ndev, int link_state)
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{
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unsigned int event;
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if (ndev->link_status == link_state)
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return;
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if (link_state == NTB_LINK_UP) {
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u16 status;
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dev_info(&ndev->pdev->dev, "Link Up\n");
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ndev->link_status = NTB_LINK_UP;
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event = NTB_EVENT_HW_LINK_UP;
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if (ndev->hw_type == BWD_HW)
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status = readw(ndev->reg_ofs.lnk_stat);
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else {
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int rc = pci_read_config_word(ndev->pdev,
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SNB_LINK_STATUS_OFFSET,
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&status);
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if (rc)
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return;
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}
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dev_info(&ndev->pdev->dev, "Link Width %d, Link Speed %d\n",
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(status & NTB_LINK_WIDTH_MASK) >> 4,
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(status & NTB_LINK_SPEED_MASK));
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} else {
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dev_info(&ndev->pdev->dev, "Link Down\n");
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ndev->link_status = NTB_LINK_DOWN;
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event = NTB_EVENT_HW_LINK_DOWN;
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}
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/* notify the upper layer if we have an event change */
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if (ndev->event_cb)
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ndev->event_cb(ndev->ntb_transport, event);
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}
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static int ntb_link_status(struct ntb_device *ndev)
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{
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int link_state;
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if (ndev->hw_type == BWD_HW) {
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u32 ntb_cntl;
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ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);
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if (ntb_cntl & BWD_CNTL_LINK_DOWN)
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link_state = NTB_LINK_DOWN;
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else
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link_state = NTB_LINK_UP;
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} else {
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u16 status;
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int rc;
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rc = pci_read_config_word(ndev->pdev, SNB_LINK_STATUS_OFFSET,
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&status);
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if (rc)
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return rc;
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if (status & NTB_LINK_STATUS_ACTIVE)
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link_state = NTB_LINK_UP;
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else
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link_state = NTB_LINK_DOWN;
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}
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ntb_link_event(ndev, link_state);
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return 0;
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}
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/* BWD doesn't have link status interrupt, poll on that platform */
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static void bwd_link_poll(struct work_struct *work)
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{
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struct ntb_device *ndev = container_of(work, struct ntb_device,
|
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hb_timer.work);
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unsigned long ts = jiffies;
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|
|
/* If we haven't gotten an interrupt in a while, check the BWD link
|
|
* status bit
|
|
*/
|
|
if (ts > ndev->last_ts + NTB_HB_TIMEOUT) {
|
|
int rc = ntb_link_status(ndev);
|
|
if (rc)
|
|
dev_err(&ndev->pdev->dev,
|
|
"Error determining link status\n");
|
|
}
|
|
|
|
schedule_delayed_work(&ndev->hb_timer, NTB_HB_TIMEOUT);
|
|
}
|
|
|
|
static int ntb_xeon_setup(struct ntb_device *ndev)
|
|
{
|
|
int rc;
|
|
u8 val;
|
|
|
|
ndev->hw_type = SNB_HW;
|
|
|
|
rc = pci_read_config_byte(ndev->pdev, NTB_PPD_OFFSET, &val);
|
|
if (rc)
|
|
return rc;
|
|
|
|
switch (val & SNB_PPD_CONN_TYPE) {
|
|
case NTB_CONN_B2B:
|
|
ndev->conn_type = NTB_CONN_B2B;
|
|
break;
|
|
case NTB_CONN_CLASSIC:
|
|
case NTB_CONN_RP:
|
|
default:
|
|
dev_err(&ndev->pdev->dev, "Only B2B supported at this time\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (val & SNB_PPD_DEV_TYPE)
|
|
ndev->dev_type = NTB_DEV_DSD;
|
|
else
|
|
ndev->dev_type = NTB_DEV_USD;
|
|
|
|
ndev->reg_ofs.pdb = ndev->reg_base + SNB_PDOORBELL_OFFSET;
|
|
ndev->reg_ofs.pdb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET;
|
|
ndev->reg_ofs.sbar2_xlat = ndev->reg_base + SNB_SBAR2XLAT_OFFSET;
|
|
ndev->reg_ofs.sbar4_xlat = ndev->reg_base + SNB_SBAR4XLAT_OFFSET;
|
|
ndev->reg_ofs.lnk_cntl = ndev->reg_base + SNB_NTBCNTL_OFFSET;
|
|
ndev->reg_ofs.lnk_stat = ndev->reg_base + SNB_LINK_STATUS_OFFSET;
|
|
ndev->reg_ofs.spad_read = ndev->reg_base + SNB_SPAD_OFFSET;
|
|
ndev->reg_ofs.spci_cmd = ndev->reg_base + SNB_PCICMD_OFFSET;
|
|
|
|
if (ndev->conn_type == NTB_CONN_B2B) {
|
|
ndev->reg_ofs.sdb = ndev->reg_base + SNB_B2B_DOORBELL_OFFSET;
|
|
ndev->reg_ofs.spad_write = ndev->reg_base + SNB_B2B_SPAD_OFFSET;
|
|
ndev->limits.max_spads = SNB_MAX_SPADS;
|
|
} else {
|
|
ndev->reg_ofs.sdb = ndev->reg_base + SNB_SDOORBELL_OFFSET;
|
|
ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET;
|
|
ndev->limits.max_spads = SNB_MAX_COMPAT_SPADS;
|
|
}
|
|
|
|
ndev->limits.max_db_bits = SNB_MAX_DB_BITS;
|
|
ndev->limits.msix_cnt = SNB_MSIX_CNT;
|
|
ndev->bits_per_vector = SNB_DB_BITS_PER_VEC;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ntb_bwd_setup(struct ntb_device *ndev)
|
|
{
|
|
int rc;
|
|
u32 val;
|
|
|
|
ndev->hw_type = BWD_HW;
|
|
|
|
rc = pci_read_config_dword(ndev->pdev, NTB_PPD_OFFSET, &val);
|
|
if (rc)
|
|
return rc;
|
|
|
|
switch ((val & BWD_PPD_CONN_TYPE) >> 8) {
|
|
case NTB_CONN_B2B:
|
|
ndev->conn_type = NTB_CONN_B2B;
|
|
break;
|
|
case NTB_CONN_RP:
|
|
default:
|
|
dev_err(&ndev->pdev->dev, "Only B2B supported at this time\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (val & BWD_PPD_DEV_TYPE)
|
|
ndev->dev_type = NTB_DEV_DSD;
|
|
else
|
|
ndev->dev_type = NTB_DEV_USD;
|
|
|
|
/* Initiate PCI-E link training */
|
|
rc = pci_write_config_dword(ndev->pdev, NTB_PPD_OFFSET,
|
|
val | BWD_PPD_INIT_LINK);
|
|
if (rc)
|
|
return rc;
|
|
|
|
ndev->reg_ofs.pdb = ndev->reg_base + BWD_PDOORBELL_OFFSET;
|
|
ndev->reg_ofs.pdb_mask = ndev->reg_base + BWD_PDBMSK_OFFSET;
|
|
ndev->reg_ofs.sbar2_xlat = ndev->reg_base + BWD_SBAR2XLAT_OFFSET;
|
|
ndev->reg_ofs.sbar4_xlat = ndev->reg_base + BWD_SBAR4XLAT_OFFSET;
|
|
ndev->reg_ofs.lnk_cntl = ndev->reg_base + BWD_NTBCNTL_OFFSET;
|
|
ndev->reg_ofs.lnk_stat = ndev->reg_base + BWD_LINK_STATUS_OFFSET;
|
|
ndev->reg_ofs.spad_read = ndev->reg_base + BWD_SPAD_OFFSET;
|
|
ndev->reg_ofs.spci_cmd = ndev->reg_base + BWD_PCICMD_OFFSET;
|
|
|
|
if (ndev->conn_type == NTB_CONN_B2B) {
|
|
ndev->reg_ofs.sdb = ndev->reg_base + BWD_B2B_DOORBELL_OFFSET;
|
|
ndev->reg_ofs.spad_write = ndev->reg_base + BWD_B2B_SPAD_OFFSET;
|
|
ndev->limits.max_spads = BWD_MAX_SPADS;
|
|
} else {
|
|
ndev->reg_ofs.sdb = ndev->reg_base + BWD_PDOORBELL_OFFSET;
|
|
ndev->reg_ofs.spad_write = ndev->reg_base + BWD_SPAD_OFFSET;
|
|
ndev->limits.max_spads = BWD_MAX_COMPAT_SPADS;
|
|
}
|
|
|
|
ndev->limits.max_db_bits = BWD_MAX_DB_BITS;
|
|
ndev->limits.msix_cnt = BWD_MSIX_CNT;
|
|
ndev->bits_per_vector = BWD_DB_BITS_PER_VEC;
|
|
|
|
/* Since bwd doesn't have a link interrupt, setup a poll timer */
|
|
INIT_DELAYED_WORK(&ndev->hb_timer, bwd_link_poll);
|
|
schedule_delayed_work(&ndev->hb_timer, NTB_HB_TIMEOUT);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ntb_device_setup(struct ntb_device *ndev)
|
|
{
|
|
int rc;
|
|
|
|
switch (ndev->pdev->device) {
|
|
case PCI_DEVICE_ID_INTEL_NTB_2ND_SNB:
|
|
case PCI_DEVICE_ID_INTEL_NTB_RP_JSF:
|
|
case PCI_DEVICE_ID_INTEL_NTB_RP_SNB:
|
|
case PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF:
|
|
case PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB:
|
|
case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF:
|
|
case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB:
|
|
rc = ntb_xeon_setup(ndev);
|
|
break;
|
|
case PCI_DEVICE_ID_INTEL_NTB_B2B_BWD:
|
|
rc = ntb_bwd_setup(ndev);
|
|
break;
|
|
default:
|
|
rc = -ENODEV;
|
|
}
|
|
|
|
/* Enable Bus Master and Memory Space on the secondary side */
|
|
writew(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, ndev->reg_ofs.spci_cmd);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void ntb_device_free(struct ntb_device *ndev)
|
|
{
|
|
if (ndev->hw_type == BWD_HW)
|
|
cancel_delayed_work_sync(&ndev->hb_timer);
|
|
}
|
|
|
|
static irqreturn_t bwd_callback_msix_irq(int irq, void *data)
|
|
{
|
|
struct ntb_db_cb *db_cb = data;
|
|
struct ntb_device *ndev = db_cb->ndev;
|
|
|
|
dev_dbg(&ndev->pdev->dev, "MSI-X irq %d received for DB %d\n", irq,
|
|
db_cb->db_num);
|
|
|
|
if (db_cb->callback)
|
|
db_cb->callback(db_cb->data, db_cb->db_num);
|
|
|
|
/* No need to check for the specific HB irq, any interrupt means
|
|
* we're connected.
|
|
*/
|
|
ndev->last_ts = jiffies;
|
|
|
|
writeq((u64) 1 << db_cb->db_num, ndev->reg_ofs.pdb);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t xeon_callback_msix_irq(int irq, void *data)
|
|
{
|
|
struct ntb_db_cb *db_cb = data;
|
|
struct ntb_device *ndev = db_cb->ndev;
|
|
|
|
dev_dbg(&ndev->pdev->dev, "MSI-X irq %d received for DB %d\n", irq,
|
|
db_cb->db_num);
|
|
|
|
if (db_cb->callback)
|
|
db_cb->callback(db_cb->data, db_cb->db_num);
|
|
|
|
/* On Sandybridge, there are 16 bits in the interrupt register
|
|
* but only 4 vectors. So, 5 bits are assigned to the first 3
|
|
* vectors, with the 4th having a single bit for link
|
|
* interrupts.
|
|
*/
|
|
writew(((1 << ndev->bits_per_vector) - 1) <<
|
|
(db_cb->db_num * ndev->bits_per_vector), ndev->reg_ofs.pdb);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/* Since we do not have a HW doorbell in BWD, this is only used in JF/JT */
|
|
static irqreturn_t xeon_event_msix_irq(int irq, void *dev)
|
|
{
|
|
struct ntb_device *ndev = dev;
|
|
int rc;
|
|
|
|
dev_dbg(&ndev->pdev->dev, "MSI-X irq %d received for Events\n", irq);
|
|
|
|
rc = ntb_link_status(ndev);
|
|
if (rc)
|
|
dev_err(&ndev->pdev->dev, "Error determining link status\n");
|
|
|
|
/* bit 15 is always the link bit */
|
|
writew(1 << ndev->limits.max_db_bits, ndev->reg_ofs.pdb);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t ntb_interrupt(int irq, void *dev)
|
|
{
|
|
struct ntb_device *ndev = dev;
|
|
unsigned int i = 0;
|
|
|
|
if (ndev->hw_type == BWD_HW) {
|
|
u64 pdb = readq(ndev->reg_ofs.pdb);
|
|
|
|
dev_dbg(&ndev->pdev->dev, "irq %d - pdb = %Lx\n", irq, pdb);
|
|
|
|
while (pdb) {
|
|
i = __ffs(pdb);
|
|
pdb &= pdb - 1;
|
|
bwd_callback_msix_irq(irq, &ndev->db_cb[i]);
|
|
}
|
|
} else {
|
|
u16 pdb = readw(ndev->reg_ofs.pdb);
|
|
|
|
dev_dbg(&ndev->pdev->dev, "irq %d - pdb = %x sdb %x\n", irq,
|
|
pdb, readw(ndev->reg_ofs.sdb));
|
|
|
|
if (pdb & SNB_DB_HW_LINK) {
|
|
xeon_event_msix_irq(irq, dev);
|
|
pdb &= ~SNB_DB_HW_LINK;
|
|
}
|
|
|
|
while (pdb) {
|
|
i = __ffs(pdb);
|
|
pdb &= pdb - 1;
|
|
xeon_callback_msix_irq(irq, &ndev->db_cb[i]);
|
|
}
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int ntb_setup_msix(struct ntb_device *ndev)
|
|
{
|
|
struct pci_dev *pdev = ndev->pdev;
|
|
struct msix_entry *msix;
|
|
int msix_entries;
|
|
int rc, i, pos;
|
|
u16 val;
|
|
|
|
pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
|
|
if (!pos) {
|
|
rc = -EIO;
|
|
goto err;
|
|
}
|
|
|
|
rc = pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS, &val);
|
|
if (rc)
|
|
goto err;
|
|
|
|
msix_entries = msix_table_size(val);
|
|
if (msix_entries > ndev->limits.msix_cnt) {
|
|
rc = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
ndev->msix_entries = kmalloc(sizeof(struct msix_entry) * msix_entries,
|
|
GFP_KERNEL);
|
|
if (!ndev->msix_entries) {
|
|
rc = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
for (i = 0; i < msix_entries; i++)
|
|
ndev->msix_entries[i].entry = i;
|
|
|
|
rc = pci_enable_msix(pdev, ndev->msix_entries, msix_entries);
|
|
if (rc < 0)
|
|
goto err1;
|
|
if (rc > 0) {
|
|
/* On SNB, the link interrupt is always tied to 4th vector. If
|
|
* we can't get all 4, then we can't use MSI-X.
|
|
*/
|
|
if (ndev->hw_type != BWD_HW) {
|
|
rc = -EIO;
|
|
goto err1;
|
|
}
|
|
|
|
dev_warn(&pdev->dev,
|
|
"Only %d MSI-X vectors. Limiting the number of queues to that number.\n",
|
|
rc);
|
|
msix_entries = rc;
|
|
}
|
|
|
|
for (i = 0; i < msix_entries; i++) {
|
|
msix = &ndev->msix_entries[i];
|
|
WARN_ON(!msix->vector);
|
|
|
|
/* Use the last MSI-X vector for Link status */
|
|
if (ndev->hw_type == BWD_HW) {
|
|
rc = request_irq(msix->vector, bwd_callback_msix_irq, 0,
|
|
"ntb-callback-msix", &ndev->db_cb[i]);
|
|
if (rc)
|
|
goto err2;
|
|
} else {
|
|
if (i == msix_entries - 1) {
|
|
rc = request_irq(msix->vector,
|
|
xeon_event_msix_irq, 0,
|
|
"ntb-event-msix", ndev);
|
|
if (rc)
|
|
goto err2;
|
|
} else {
|
|
rc = request_irq(msix->vector,
|
|
xeon_callback_msix_irq, 0,
|
|
"ntb-callback-msix",
|
|
&ndev->db_cb[i]);
|
|
if (rc)
|
|
goto err2;
|
|
}
|
|
}
|
|
}
|
|
|
|
ndev->num_msix = msix_entries;
|
|
if (ndev->hw_type == BWD_HW)
|
|
ndev->max_cbs = msix_entries;
|
|
else
|
|
ndev->max_cbs = msix_entries - 1;
|
|
|
|
return 0;
|
|
|
|
err2:
|
|
while (--i >= 0) {
|
|
msix = &ndev->msix_entries[i];
|
|
if (ndev->hw_type != BWD_HW && i == ndev->num_msix - 1)
|
|
free_irq(msix->vector, ndev);
|
|
else
|
|
free_irq(msix->vector, &ndev->db_cb[i]);
|
|
}
|
|
pci_disable_msix(pdev);
|
|
err1:
|
|
kfree(ndev->msix_entries);
|
|
dev_err(&pdev->dev, "Error allocating MSI-X interrupt\n");
|
|
err:
|
|
ndev->num_msix = 0;
|
|
return rc;
|
|
}
|
|
|
|
static int ntb_setup_msi(struct ntb_device *ndev)
|
|
{
|
|
struct pci_dev *pdev = ndev->pdev;
|
|
int rc;
|
|
|
|
rc = pci_enable_msi(pdev);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = request_irq(pdev->irq, ntb_interrupt, 0, "ntb-msi", ndev);
|
|
if (rc) {
|
|
pci_disable_msi(pdev);
|
|
dev_err(&pdev->dev, "Error allocating MSI interrupt\n");
|
|
return rc;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ntb_setup_intx(struct ntb_device *ndev)
|
|
{
|
|
struct pci_dev *pdev = ndev->pdev;
|
|
int rc;
|
|
|
|
pci_msi_off(pdev);
|
|
|
|
/* Verify intx is enabled */
|
|
pci_intx(pdev, 1);
|
|
|
|
rc = request_irq(pdev->irq, ntb_interrupt, IRQF_SHARED, "ntb-intx",
|
|
ndev);
|
|
if (rc)
|
|
return rc;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ntb_setup_interrupts(struct ntb_device *ndev)
|
|
{
|
|
int rc;
|
|
|
|
/* On BWD, disable all interrupts. On SNB, disable all but Link
|
|
* Interrupt. The rest will be unmasked as callbacks are registered.
|
|
*/
|
|
if (ndev->hw_type == BWD_HW)
|
|
writeq(~0, ndev->reg_ofs.pdb_mask);
|
|
else
|
|
writew(~(1 << ndev->limits.max_db_bits),
|
|
ndev->reg_ofs.pdb_mask);
|
|
|
|
rc = ntb_setup_msix(ndev);
|
|
if (!rc)
|
|
goto done;
|
|
|
|
ndev->bits_per_vector = 1;
|
|
ndev->max_cbs = ndev->limits.max_db_bits;
|
|
|
|
rc = ntb_setup_msi(ndev);
|
|
if (!rc)
|
|
goto done;
|
|
|
|
rc = ntb_setup_intx(ndev);
|
|
if (rc) {
|
|
dev_err(&ndev->pdev->dev, "no usable interrupts\n");
|
|
return rc;
|
|
}
|
|
|
|
done:
|
|
return 0;
|
|
}
|
|
|
|
static void ntb_free_interrupts(struct ntb_device *ndev)
|
|
{
|
|
struct pci_dev *pdev = ndev->pdev;
|
|
|
|
/* mask interrupts */
|
|
if (ndev->hw_type == BWD_HW)
|
|
writeq(~0, ndev->reg_ofs.pdb_mask);
|
|
else
|
|
writew(~0, ndev->reg_ofs.pdb_mask);
|
|
|
|
if (ndev->num_msix) {
|
|
struct msix_entry *msix;
|
|
u32 i;
|
|
|
|
for (i = 0; i < ndev->num_msix; i++) {
|
|
msix = &ndev->msix_entries[i];
|
|
if (ndev->hw_type != BWD_HW && i == ndev->num_msix - 1)
|
|
free_irq(msix->vector, ndev);
|
|
else
|
|
free_irq(msix->vector, &ndev->db_cb[i]);
|
|
}
|
|
pci_disable_msix(pdev);
|
|
} else {
|
|
free_irq(pdev->irq, ndev);
|
|
|
|
if (pci_dev_msi_enabled(pdev))
|
|
pci_disable_msi(pdev);
|
|
}
|
|
}
|
|
|
|
static int ntb_create_callbacks(struct ntb_device *ndev)
|
|
{
|
|
int i;
|
|
|
|
/* Checken-egg issue. We won't know how many callbacks are necessary
|
|
* until we see how many MSI-X vectors we get, but these pointers need
|
|
* to be passed into the MSI-X register fucntion. So, we allocate the
|
|
* max, knowing that they might not all be used, to work around this.
|
|
*/
|
|
ndev->db_cb = kcalloc(ndev->limits.max_db_bits,
|
|
sizeof(struct ntb_db_cb),
|
|
GFP_KERNEL);
|
|
if (!ndev->db_cb)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ndev->limits.max_db_bits; i++) {
|
|
ndev->db_cb[i].db_num = i;
|
|
ndev->db_cb[i].ndev = ndev;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ntb_free_callbacks(struct ntb_device *ndev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ndev->limits.max_db_bits; i++)
|
|
ntb_unregister_db_callback(ndev, i);
|
|
|
|
kfree(ndev->db_cb);
|
|
}
|
|
|
|
static int ntb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
{
|
|
struct ntb_device *ndev;
|
|
int rc, i;
|
|
|
|
ndev = kzalloc(sizeof(struct ntb_device), GFP_KERNEL);
|
|
if (!ndev)
|
|
return -ENOMEM;
|
|
|
|
ndev->pdev = pdev;
|
|
ndev->link_status = NTB_LINK_DOWN;
|
|
pci_set_drvdata(pdev, ndev);
|
|
|
|
rc = pci_enable_device(pdev);
|
|
if (rc)
|
|
goto err;
|
|
|
|
pci_set_master(ndev->pdev);
|
|
|
|
rc = pci_request_selected_regions(pdev, NTB_BAR_MASK, KBUILD_MODNAME);
|
|
if (rc)
|
|
goto err1;
|
|
|
|
ndev->reg_base = pci_ioremap_bar(pdev, NTB_BAR_MMIO);
|
|
if (!ndev->reg_base) {
|
|
dev_warn(&pdev->dev, "Cannot remap BAR 0\n");
|
|
rc = -EIO;
|
|
goto err2;
|
|
}
|
|
|
|
for (i = 0; i < NTB_NUM_MW; i++) {
|
|
ndev->mw[i].bar_sz = pci_resource_len(pdev, MW_TO_BAR(i));
|
|
ndev->mw[i].vbase =
|
|
ioremap_wc(pci_resource_start(pdev, MW_TO_BAR(i)),
|
|
ndev->mw[i].bar_sz);
|
|
dev_info(&pdev->dev, "MW %d size %llu\n", i,
|
|
pci_resource_len(pdev, MW_TO_BAR(i)));
|
|
if (!ndev->mw[i].vbase) {
|
|
dev_warn(&pdev->dev, "Cannot remap BAR %d\n",
|
|
MW_TO_BAR(i));
|
|
rc = -EIO;
|
|
goto err3;
|
|
}
|
|
}
|
|
|
|
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
if (rc) {
|
|
rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
|
if (rc)
|
|
goto err3;
|
|
|
|
dev_warn(&pdev->dev, "Cannot DMA highmem\n");
|
|
}
|
|
|
|
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
if (rc) {
|
|
rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
|
if (rc)
|
|
goto err3;
|
|
|
|
dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n");
|
|
}
|
|
|
|
rc = ntb_device_setup(ndev);
|
|
if (rc)
|
|
goto err3;
|
|
|
|
rc = ntb_create_callbacks(ndev);
|
|
if (rc)
|
|
goto err4;
|
|
|
|
rc = ntb_setup_interrupts(ndev);
|
|
if (rc)
|
|
goto err5;
|
|
|
|
/* The scratchpad registers keep the values between rmmod/insmod,
|
|
* blast them now
|
|
*/
|
|
for (i = 0; i < ndev->limits.max_spads; i++) {
|
|
ntb_write_local_spad(ndev, i, 0);
|
|
ntb_write_remote_spad(ndev, i, 0);
|
|
}
|
|
|
|
rc = ntb_transport_init(pdev);
|
|
if (rc)
|
|
goto err6;
|
|
|
|
/* Let's bring the NTB link up */
|
|
writel(NTB_CNTL_BAR23_SNOOP | NTB_CNTL_BAR45_SNOOP,
|
|
ndev->reg_ofs.lnk_cntl);
|
|
|
|
return 0;
|
|
|
|
err6:
|
|
ntb_free_interrupts(ndev);
|
|
err5:
|
|
ntb_free_callbacks(ndev);
|
|
err4:
|
|
ntb_device_free(ndev);
|
|
err3:
|
|
for (i--; i >= 0; i--)
|
|
iounmap(ndev->mw[i].vbase);
|
|
iounmap(ndev->reg_base);
|
|
err2:
|
|
pci_release_selected_regions(pdev, NTB_BAR_MASK);
|
|
err1:
|
|
pci_disable_device(pdev);
|
|
err:
|
|
kfree(ndev);
|
|
|
|
dev_err(&pdev->dev, "Error loading %s module\n", KBUILD_MODNAME);
|
|
return rc;
|
|
}
|
|
|
|
static void ntb_pci_remove(struct pci_dev *pdev)
|
|
{
|
|
struct ntb_device *ndev = pci_get_drvdata(pdev);
|
|
int i;
|
|
u32 ntb_cntl;
|
|
|
|
/* Bring NTB link down */
|
|
ntb_cntl = readl(ndev->reg_ofs.lnk_cntl);
|
|
ntb_cntl |= NTB_LINK_DISABLE;
|
|
writel(ntb_cntl, ndev->reg_ofs.lnk_cntl);
|
|
|
|
ntb_transport_free(ndev->ntb_transport);
|
|
|
|
ntb_free_interrupts(ndev);
|
|
ntb_free_callbacks(ndev);
|
|
ntb_device_free(ndev);
|
|
|
|
for (i = 0; i < NTB_NUM_MW; i++)
|
|
iounmap(ndev->mw[i].vbase);
|
|
|
|
iounmap(ndev->reg_base);
|
|
pci_release_selected_regions(pdev, NTB_BAR_MASK);
|
|
pci_disable_device(pdev);
|
|
kfree(ndev);
|
|
}
|
|
|
|
static struct pci_driver ntb_pci_driver = {
|
|
.name = KBUILD_MODNAME,
|
|
.id_table = ntb_pci_tbl,
|
|
.probe = ntb_pci_probe,
|
|
.remove = ntb_pci_remove,
|
|
};
|
|
module_pci_driver(ntb_pci_driver);
|