![Linus Torvalds](/assets/img/avatar_default.png)
Pull thermal management updates from Zhang Rui: "There are not too many changes this time, except two new platform thermal drivers, ti-soc-thermal driver and x86_pkg_temp_thermal driver, and a couple of small fixes. Highlights: - move the ti-soc-thermal driver out of the staging tree to the thermal tree. - introduce the x86_pkg_temp_thermal driver. This driver registers CPU digital temperature package level sensor as a thermal zone. - small fixes/cleanups including removing redundant use of platform_set_drvdata() and of_match_ptr for all platform thermal drivers" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (34 commits) thermal: cpu_cooling: fix stub function thermal: ti-soc-thermal: use standard GPIO DT bindings thermal: MAINTAINERS: Add git tree path for SoC specific updates thermal: fix x86_pkg_temp_thermal.c build and Kconfig Thermal: Documentation for x86 package temperature thermal driver Thermal: CPU Package temperature thermal thermal: consider emul_temperature while computing trend thermal: ti-soc-thermal: add DT example for DRA752 chip thermal: ti-soc-thermal: add dra752 chip to device table thermal: ti-soc-thermal: add thermal data for DRA752 chips thermal: ti-soc-thermal: remove usage of IS_ERR_OR_NULL thermal: ti-soc-thermal: freeze FSM while computing trend thermal: ti-soc-thermal: remove external heat while extrapolating hotspot thermal: ti-soc-thermal: update DT reference for OMAP5430 x86, mcheck, therm_throt: Process package thresholds thermal: cpu_cooling: fix 'descend' check in get_property() Thermal: spear: Remove redundant use of of_match_ptr Thermal: kirkwood: Remove redundant use of of_match_ptr Thermal: dove: Remove redundant use of of_match_ptr Thermal: armada: Remove redundant use of of_match_ptr ...
1060 lines
27 KiB
C
1060 lines
27 KiB
C
/*
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* exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
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*
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* Copyright (C) 2011 Samsung Electronics
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* Donggeun Kim <dg77.kim@samsung.com>
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* Amit Daniel Kachhap <amit.kachhap@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/clk.h>
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#include <linux/workqueue.h>
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#include <linux/sysfs.h>
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#include <linux/kobject.h>
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/platform_data/exynos_thermal.h>
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#include <linux/thermal.h>
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#include <linux/cpufreq.h>
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#include <linux/cpu_cooling.h>
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#include <linux/of.h>
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/* Exynos generic registers */
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#define EXYNOS_TMU_REG_TRIMINFO 0x0
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#define EXYNOS_TMU_REG_CONTROL 0x20
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#define EXYNOS_TMU_REG_STATUS 0x28
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#define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
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#define EXYNOS_TMU_REG_INTEN 0x70
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#define EXYNOS_TMU_REG_INTSTAT 0x74
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#define EXYNOS_TMU_REG_INTCLEAR 0x78
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#define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
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#define EXYNOS_TMU_GAIN_SHIFT 8
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#define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
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#define EXYNOS_TMU_CORE_ON 3
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#define EXYNOS_TMU_CORE_OFF 2
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#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
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/* Exynos4210 specific registers */
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#define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
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#define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
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#define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
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#define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
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#define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
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#define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
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#define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
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#define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
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#define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
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#define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1
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#define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10
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#define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100
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#define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000
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#define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111
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/* Exynos5250 and Exynos4412 specific registers */
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#define EXYNOS_TMU_TRIMINFO_CON 0x14
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#define EXYNOS_THD_TEMP_RISE 0x50
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#define EXYNOS_THD_TEMP_FALL 0x54
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#define EXYNOS_EMUL_CON 0x80
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#define EXYNOS_TRIMINFO_RELOAD 0x1
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#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
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#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
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#define EXYNOS_MUX_ADDR_VALUE 6
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#define EXYNOS_MUX_ADDR_SHIFT 20
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#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
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#define EFUSE_MIN_VALUE 40
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#define EFUSE_MAX_VALUE 100
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/* In-kernel thermal framework related macros & definations */
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#define SENSOR_NAME_LEN 16
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#define MAX_TRIP_COUNT 8
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#define MAX_COOLING_DEVICE 4
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#define MAX_THRESHOLD_LEVS 4
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#define ACTIVE_INTERVAL 500
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#define IDLE_INTERVAL 10000
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#define MCELSIUS 1000
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#ifdef CONFIG_THERMAL_EMULATION
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#define EXYNOS_EMUL_TIME 0x57F0
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#define EXYNOS_EMUL_TIME_SHIFT 16
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#define EXYNOS_EMUL_DATA_SHIFT 8
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#define EXYNOS_EMUL_DATA_MASK 0xFF
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#define EXYNOS_EMUL_ENABLE 0x1
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#endif /* CONFIG_THERMAL_EMULATION */
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/* CPU Zone information */
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#define PANIC_ZONE 4
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#define WARN_ZONE 3
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#define MONITOR_ZONE 2
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#define SAFE_ZONE 1
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#define GET_ZONE(trip) (trip + 2)
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#define GET_TRIP(zone) (zone - 2)
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#define EXYNOS_ZONE_COUNT 3
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struct exynos_tmu_data {
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struct exynos_tmu_platform_data *pdata;
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struct resource *mem;
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void __iomem *base;
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int irq;
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enum soc_type soc;
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struct work_struct irq_work;
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struct mutex lock;
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struct clk *clk;
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u8 temp_error1, temp_error2;
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};
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struct thermal_trip_point_conf {
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int trip_val[MAX_TRIP_COUNT];
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int trip_count;
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u8 trigger_falling;
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};
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struct thermal_cooling_conf {
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struct freq_clip_table freq_data[MAX_TRIP_COUNT];
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int freq_clip_count;
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};
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struct thermal_sensor_conf {
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char name[SENSOR_NAME_LEN];
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int (*read_temperature)(void *data);
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int (*write_emul_temp)(void *drv_data, unsigned long temp);
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struct thermal_trip_point_conf trip_data;
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struct thermal_cooling_conf cooling_data;
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void *private_data;
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};
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struct exynos_thermal_zone {
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enum thermal_device_mode mode;
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struct thermal_zone_device *therm_dev;
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struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
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unsigned int cool_dev_size;
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struct platform_device *exynos4_dev;
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struct thermal_sensor_conf *sensor_conf;
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bool bind;
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};
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static struct exynos_thermal_zone *th_zone;
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static void exynos_unregister_thermal(void);
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static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
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/* Get mode callback functions for thermal zone */
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static int exynos_get_mode(struct thermal_zone_device *thermal,
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enum thermal_device_mode *mode)
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{
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if (th_zone)
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*mode = th_zone->mode;
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return 0;
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}
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/* Set mode callback functions for thermal zone */
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static int exynos_set_mode(struct thermal_zone_device *thermal,
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enum thermal_device_mode mode)
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{
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if (!th_zone->therm_dev) {
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pr_notice("thermal zone not registered\n");
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return 0;
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}
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mutex_lock(&th_zone->therm_dev->lock);
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if (mode == THERMAL_DEVICE_ENABLED &&
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!th_zone->sensor_conf->trip_data.trigger_falling)
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th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
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else
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th_zone->therm_dev->polling_delay = 0;
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mutex_unlock(&th_zone->therm_dev->lock);
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th_zone->mode = mode;
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thermal_zone_device_update(th_zone->therm_dev);
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pr_info("thermal polling set for duration=%d msec\n",
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th_zone->therm_dev->polling_delay);
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return 0;
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}
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/* Get trip type callback functions for thermal zone */
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static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
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enum thermal_trip_type *type)
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{
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switch (GET_ZONE(trip)) {
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case MONITOR_ZONE:
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case WARN_ZONE:
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*type = THERMAL_TRIP_ACTIVE;
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break;
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case PANIC_ZONE:
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*type = THERMAL_TRIP_CRITICAL;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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/* Get trip temperature callback functions for thermal zone */
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static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
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unsigned long *temp)
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{
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if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
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return -EINVAL;
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*temp = th_zone->sensor_conf->trip_data.trip_val[trip];
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/* convert the temperature into millicelsius */
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*temp = *temp * MCELSIUS;
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return 0;
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}
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/* Get critical temperature callback functions for thermal zone */
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static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
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unsigned long *temp)
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{
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int ret;
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/* Panic zone */
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ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
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return ret;
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}
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/* Bind callback functions for thermal zone */
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static int exynos_bind(struct thermal_zone_device *thermal,
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struct thermal_cooling_device *cdev)
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{
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int ret = 0, i, tab_size, level;
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struct freq_clip_table *tab_ptr, *clip_data;
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struct thermal_sensor_conf *data = th_zone->sensor_conf;
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tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
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tab_size = data->cooling_data.freq_clip_count;
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if (tab_ptr == NULL || tab_size == 0)
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return -EINVAL;
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/* find the cooling device registered*/
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for (i = 0; i < th_zone->cool_dev_size; i++)
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if (cdev == th_zone->cool_dev[i])
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break;
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/* No matching cooling device */
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if (i == th_zone->cool_dev_size)
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return 0;
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/* Bind the thermal zone to the cpufreq cooling device */
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for (i = 0; i < tab_size; i++) {
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clip_data = (struct freq_clip_table *)&(tab_ptr[i]);
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level = cpufreq_cooling_get_level(0, clip_data->freq_clip_max);
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if (level == THERMAL_CSTATE_INVALID)
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return 0;
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switch (GET_ZONE(i)) {
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case MONITOR_ZONE:
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case WARN_ZONE:
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if (thermal_zone_bind_cooling_device(thermal, i, cdev,
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level, 0)) {
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pr_err("error binding cdev inst %d\n", i);
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ret = -EINVAL;
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}
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th_zone->bind = true;
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break;
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default:
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ret = -EINVAL;
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}
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}
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return ret;
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}
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/* Unbind callback functions for thermal zone */
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static int exynos_unbind(struct thermal_zone_device *thermal,
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struct thermal_cooling_device *cdev)
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{
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int ret = 0, i, tab_size;
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struct thermal_sensor_conf *data = th_zone->sensor_conf;
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if (th_zone->bind == false)
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return 0;
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tab_size = data->cooling_data.freq_clip_count;
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if (tab_size == 0)
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return -EINVAL;
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/* find the cooling device registered*/
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for (i = 0; i < th_zone->cool_dev_size; i++)
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if (cdev == th_zone->cool_dev[i])
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break;
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/* No matching cooling device */
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if (i == th_zone->cool_dev_size)
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return 0;
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/* Bind the thermal zone to the cpufreq cooling device */
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for (i = 0; i < tab_size; i++) {
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switch (GET_ZONE(i)) {
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case MONITOR_ZONE:
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case WARN_ZONE:
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if (thermal_zone_unbind_cooling_device(thermal, i,
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cdev)) {
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pr_err("error unbinding cdev inst=%d\n", i);
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ret = -EINVAL;
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}
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th_zone->bind = false;
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break;
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default:
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ret = -EINVAL;
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}
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}
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return ret;
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}
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/* Get temperature callback functions for thermal zone */
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static int exynos_get_temp(struct thermal_zone_device *thermal,
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unsigned long *temp)
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{
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void *data;
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if (!th_zone->sensor_conf) {
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pr_info("Temperature sensor not initialised\n");
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return -EINVAL;
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}
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data = th_zone->sensor_conf->private_data;
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*temp = th_zone->sensor_conf->read_temperature(data);
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/* convert the temperature into millicelsius */
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*temp = *temp * MCELSIUS;
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return 0;
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}
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/* Get temperature callback functions for thermal zone */
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static int exynos_set_emul_temp(struct thermal_zone_device *thermal,
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unsigned long temp)
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{
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void *data;
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int ret = -EINVAL;
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if (!th_zone->sensor_conf) {
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pr_info("Temperature sensor not initialised\n");
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return -EINVAL;
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}
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data = th_zone->sensor_conf->private_data;
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if (th_zone->sensor_conf->write_emul_temp)
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ret = th_zone->sensor_conf->write_emul_temp(data, temp);
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return ret;
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}
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/* Get the temperature trend */
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static int exynos_get_trend(struct thermal_zone_device *thermal,
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int trip, enum thermal_trend *trend)
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{
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int ret;
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unsigned long trip_temp;
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ret = exynos_get_trip_temp(thermal, trip, &trip_temp);
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if (ret < 0)
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return ret;
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if (thermal->temperature >= trip_temp)
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*trend = THERMAL_TREND_RAISE_FULL;
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else
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*trend = THERMAL_TREND_DROP_FULL;
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return 0;
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}
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/* Operation callback functions for thermal zone */
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static struct thermal_zone_device_ops const exynos_dev_ops = {
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.bind = exynos_bind,
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.unbind = exynos_unbind,
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.get_temp = exynos_get_temp,
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.set_emul_temp = exynos_set_emul_temp,
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.get_trend = exynos_get_trend,
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.get_mode = exynos_get_mode,
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.set_mode = exynos_set_mode,
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.get_trip_type = exynos_get_trip_type,
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.get_trip_temp = exynos_get_trip_temp,
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.get_crit_temp = exynos_get_crit_temp,
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};
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/*
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* This function may be called from interrupt based temperature sensor
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* when threshold is changed.
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*/
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static void exynos_report_trigger(void)
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{
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unsigned int i;
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char data[10];
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char *envp[] = { data, NULL };
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if (!th_zone || !th_zone->therm_dev)
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return;
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if (th_zone->bind == false) {
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for (i = 0; i < th_zone->cool_dev_size; i++) {
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if (!th_zone->cool_dev[i])
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continue;
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exynos_bind(th_zone->therm_dev,
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th_zone->cool_dev[i]);
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}
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}
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thermal_zone_device_update(th_zone->therm_dev);
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mutex_lock(&th_zone->therm_dev->lock);
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/* Find the level for which trip happened */
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for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
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if (th_zone->therm_dev->last_temperature <
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th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
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break;
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}
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if (th_zone->mode == THERMAL_DEVICE_ENABLED &&
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!th_zone->sensor_conf->trip_data.trigger_falling) {
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if (i > 0)
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th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
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else
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th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
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}
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snprintf(data, sizeof(data), "%u", i);
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kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
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mutex_unlock(&th_zone->therm_dev->lock);
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}
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/* Register with the in-kernel thermal management */
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static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
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{
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int ret;
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struct cpumask mask_val;
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if (!sensor_conf || !sensor_conf->read_temperature) {
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pr_err("Temperature sensor not initialised\n");
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return -EINVAL;
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}
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th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
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if (!th_zone)
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return -ENOMEM;
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th_zone->sensor_conf = sensor_conf;
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cpumask_set_cpu(0, &mask_val);
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th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
|
|
if (IS_ERR(th_zone->cool_dev[0])) {
|
|
pr_err("Failed to register cpufreq cooling device\n");
|
|
ret = -EINVAL;
|
|
goto err_unregister;
|
|
}
|
|
th_zone->cool_dev_size++;
|
|
|
|
th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
|
|
EXYNOS_ZONE_COUNT, 0, NULL, &exynos_dev_ops, NULL, 0,
|
|
sensor_conf->trip_data.trigger_falling ?
|
|
0 : IDLE_INTERVAL);
|
|
|
|
if (IS_ERR(th_zone->therm_dev)) {
|
|
pr_err("Failed to register thermal zone device\n");
|
|
ret = PTR_ERR(th_zone->therm_dev);
|
|
goto err_unregister;
|
|
}
|
|
th_zone->mode = THERMAL_DEVICE_ENABLED;
|
|
|
|
pr_info("Exynos: Kernel Thermal management registered\n");
|
|
|
|
return 0;
|
|
|
|
err_unregister:
|
|
exynos_unregister_thermal();
|
|
return ret;
|
|
}
|
|
|
|
/* Un-Register with the in-kernel thermal management */
|
|
static void exynos_unregister_thermal(void)
|
|
{
|
|
int i;
|
|
|
|
if (!th_zone)
|
|
return;
|
|
|
|
if (th_zone->therm_dev)
|
|
thermal_zone_device_unregister(th_zone->therm_dev);
|
|
|
|
for (i = 0; i < th_zone->cool_dev_size; i++) {
|
|
if (th_zone->cool_dev[i])
|
|
cpufreq_cooling_unregister(th_zone->cool_dev[i]);
|
|
}
|
|
|
|
kfree(th_zone);
|
|
pr_info("Exynos: Kernel Thermal management unregistered\n");
|
|
}
|
|
|
|
/*
|
|
* TMU treats temperature as a mapped temperature code.
|
|
* The temperature is converted differently depending on the calibration type.
|
|
*/
|
|
static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
|
|
{
|
|
struct exynos_tmu_platform_data *pdata = data->pdata;
|
|
int temp_code;
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS4210)
|
|
/* temp should range between 25 and 125 */
|
|
if (temp < 25 || temp > 125) {
|
|
temp_code = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
switch (pdata->cal_type) {
|
|
case TYPE_TWO_POINT_TRIMMING:
|
|
temp_code = (temp - 25) *
|
|
(data->temp_error2 - data->temp_error1) /
|
|
(85 - 25) + data->temp_error1;
|
|
break;
|
|
case TYPE_ONE_POINT_TRIMMING:
|
|
temp_code = temp + data->temp_error1 - 25;
|
|
break;
|
|
default:
|
|
temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
|
|
break;
|
|
}
|
|
out:
|
|
return temp_code;
|
|
}
|
|
|
|
/*
|
|
* Calculate a temperature value from a temperature code.
|
|
* The unit of the temperature is degree Celsius.
|
|
*/
|
|
static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
|
|
{
|
|
struct exynos_tmu_platform_data *pdata = data->pdata;
|
|
int temp;
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS4210)
|
|
/* temp_code should range between 75 and 175 */
|
|
if (temp_code < 75 || temp_code > 175) {
|
|
temp = -ENODATA;
|
|
goto out;
|
|
}
|
|
|
|
switch (pdata->cal_type) {
|
|
case TYPE_TWO_POINT_TRIMMING:
|
|
temp = (temp_code - data->temp_error1) * (85 - 25) /
|
|
(data->temp_error2 - data->temp_error1) + 25;
|
|
break;
|
|
case TYPE_ONE_POINT_TRIMMING:
|
|
temp = temp_code - data->temp_error1 + 25;
|
|
break;
|
|
default:
|
|
temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
|
|
break;
|
|
}
|
|
out:
|
|
return temp;
|
|
}
|
|
|
|
static int exynos_tmu_initialize(struct platform_device *pdev)
|
|
{
|
|
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
|
struct exynos_tmu_platform_data *pdata = data->pdata;
|
|
unsigned int status, trim_info;
|
|
unsigned int rising_threshold = 0, falling_threshold = 0;
|
|
int ret = 0, threshold_code, i, trigger_levs = 0;
|
|
|
|
mutex_lock(&data->lock);
|
|
clk_enable(data->clk);
|
|
|
|
status = readb(data->base + EXYNOS_TMU_REG_STATUS);
|
|
if (!status) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS) {
|
|
__raw_writel(EXYNOS_TRIMINFO_RELOAD,
|
|
data->base + EXYNOS_TMU_TRIMINFO_CON);
|
|
}
|
|
/* Save trimming info in order to perform calibration */
|
|
trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
|
|
data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
|
|
data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
|
|
|
|
if ((EFUSE_MIN_VALUE > data->temp_error1) ||
|
|
(data->temp_error1 > EFUSE_MAX_VALUE) ||
|
|
(data->temp_error2 != 0))
|
|
data->temp_error1 = pdata->efuse_value;
|
|
|
|
/* Count trigger levels to be enabled */
|
|
for (i = 0; i < MAX_THRESHOLD_LEVS; i++)
|
|
if (pdata->trigger_levels[i])
|
|
trigger_levs++;
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS4210) {
|
|
/* Write temperature code for threshold */
|
|
threshold_code = temp_to_code(data, pdata->threshold);
|
|
if (threshold_code < 0) {
|
|
ret = threshold_code;
|
|
goto out;
|
|
}
|
|
writeb(threshold_code,
|
|
data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
|
|
for (i = 0; i < trigger_levs; i++)
|
|
writeb(pdata->trigger_levels[i],
|
|
data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
|
|
|
|
writel(EXYNOS4210_TMU_INTCLEAR_VAL,
|
|
data->base + EXYNOS_TMU_REG_INTCLEAR);
|
|
} else if (data->soc == SOC_ARCH_EXYNOS) {
|
|
/* Write temperature code for rising and falling threshold */
|
|
for (i = 0; i < trigger_levs; i++) {
|
|
threshold_code = temp_to_code(data,
|
|
pdata->trigger_levels[i]);
|
|
if (threshold_code < 0) {
|
|
ret = threshold_code;
|
|
goto out;
|
|
}
|
|
rising_threshold |= threshold_code << 8 * i;
|
|
if (pdata->threshold_falling) {
|
|
threshold_code = temp_to_code(data,
|
|
pdata->trigger_levels[i] -
|
|
pdata->threshold_falling);
|
|
if (threshold_code > 0)
|
|
falling_threshold |=
|
|
threshold_code << 8 * i;
|
|
}
|
|
}
|
|
|
|
writel(rising_threshold,
|
|
data->base + EXYNOS_THD_TEMP_RISE);
|
|
writel(falling_threshold,
|
|
data->base + EXYNOS_THD_TEMP_FALL);
|
|
|
|
writel(EXYNOS_TMU_CLEAR_RISE_INT | EXYNOS_TMU_CLEAR_FALL_INT,
|
|
data->base + EXYNOS_TMU_REG_INTCLEAR);
|
|
}
|
|
out:
|
|
clk_disable(data->clk);
|
|
mutex_unlock(&data->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void exynos_tmu_control(struct platform_device *pdev, bool on)
|
|
{
|
|
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
|
struct exynos_tmu_platform_data *pdata = data->pdata;
|
|
unsigned int con, interrupt_en;
|
|
|
|
mutex_lock(&data->lock);
|
|
clk_enable(data->clk);
|
|
|
|
con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
|
|
pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS) {
|
|
con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
|
|
con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
|
|
}
|
|
|
|
if (on) {
|
|
con |= EXYNOS_TMU_CORE_ON;
|
|
interrupt_en = pdata->trigger_level3_en << 12 |
|
|
pdata->trigger_level2_en << 8 |
|
|
pdata->trigger_level1_en << 4 |
|
|
pdata->trigger_level0_en;
|
|
if (pdata->threshold_falling)
|
|
interrupt_en |= interrupt_en << 16;
|
|
} else {
|
|
con |= EXYNOS_TMU_CORE_OFF;
|
|
interrupt_en = 0; /* Disable all interrupts */
|
|
}
|
|
writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
|
|
writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
|
|
|
|
clk_disable(data->clk);
|
|
mutex_unlock(&data->lock);
|
|
}
|
|
|
|
static int exynos_tmu_read(struct exynos_tmu_data *data)
|
|
{
|
|
u8 temp_code;
|
|
int temp;
|
|
|
|
mutex_lock(&data->lock);
|
|
clk_enable(data->clk);
|
|
|
|
temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
|
|
temp = code_to_temp(data, temp_code);
|
|
|
|
clk_disable(data->clk);
|
|
mutex_unlock(&data->lock);
|
|
|
|
return temp;
|
|
}
|
|
|
|
#ifdef CONFIG_THERMAL_EMULATION
|
|
static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
|
|
{
|
|
struct exynos_tmu_data *data = drv_data;
|
|
unsigned int reg;
|
|
int ret = -EINVAL;
|
|
|
|
if (data->soc == SOC_ARCH_EXYNOS4210)
|
|
goto out;
|
|
|
|
if (temp && temp < MCELSIUS)
|
|
goto out;
|
|
|
|
mutex_lock(&data->lock);
|
|
clk_enable(data->clk);
|
|
|
|
reg = readl(data->base + EXYNOS_EMUL_CON);
|
|
|
|
if (temp) {
|
|
temp /= MCELSIUS;
|
|
|
|
reg = (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT) |
|
|
(temp_to_code(data, temp)
|
|
<< EXYNOS_EMUL_DATA_SHIFT) | EXYNOS_EMUL_ENABLE;
|
|
} else {
|
|
reg &= ~EXYNOS_EMUL_ENABLE;
|
|
}
|
|
|
|
writel(reg, data->base + EXYNOS_EMUL_CON);
|
|
|
|
clk_disable(data->clk);
|
|
mutex_unlock(&data->lock);
|
|
return 0;
|
|
out:
|
|
return ret;
|
|
}
|
|
#else
|
|
static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
|
|
{ return -EINVAL; }
|
|
#endif/*CONFIG_THERMAL_EMULATION*/
|
|
|
|
static void exynos_tmu_work(struct work_struct *work)
|
|
{
|
|
struct exynos_tmu_data *data = container_of(work,
|
|
struct exynos_tmu_data, irq_work);
|
|
|
|
exynos_report_trigger();
|
|
mutex_lock(&data->lock);
|
|
clk_enable(data->clk);
|
|
if (data->soc == SOC_ARCH_EXYNOS)
|
|
writel(EXYNOS_TMU_CLEAR_RISE_INT |
|
|
EXYNOS_TMU_CLEAR_FALL_INT,
|
|
data->base + EXYNOS_TMU_REG_INTCLEAR);
|
|
else
|
|
writel(EXYNOS4210_TMU_INTCLEAR_VAL,
|
|
data->base + EXYNOS_TMU_REG_INTCLEAR);
|
|
clk_disable(data->clk);
|
|
mutex_unlock(&data->lock);
|
|
|
|
enable_irq(data->irq);
|
|
}
|
|
|
|
static irqreturn_t exynos_tmu_irq(int irq, void *id)
|
|
{
|
|
struct exynos_tmu_data *data = id;
|
|
|
|
disable_irq_nosync(irq);
|
|
schedule_work(&data->irq_work);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
static struct thermal_sensor_conf exynos_sensor_conf = {
|
|
.name = "exynos-therm",
|
|
.read_temperature = (int (*)(void *))exynos_tmu_read,
|
|
.write_emul_temp = exynos_tmu_set_emulation,
|
|
};
|
|
|
|
#if defined(CONFIG_CPU_EXYNOS4210)
|
|
static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
|
|
.threshold = 80,
|
|
.trigger_levels[0] = 5,
|
|
.trigger_levels[1] = 20,
|
|
.trigger_levels[2] = 30,
|
|
.trigger_level0_en = 1,
|
|
.trigger_level1_en = 1,
|
|
.trigger_level2_en = 1,
|
|
.trigger_level3_en = 0,
|
|
.gain = 15,
|
|
.reference_voltage = 7,
|
|
.cal_type = TYPE_ONE_POINT_TRIMMING,
|
|
.freq_tab[0] = {
|
|
.freq_clip_max = 800 * 1000,
|
|
.temp_level = 85,
|
|
},
|
|
.freq_tab[1] = {
|
|
.freq_clip_max = 200 * 1000,
|
|
.temp_level = 100,
|
|
},
|
|
.freq_tab_count = 2,
|
|
.type = SOC_ARCH_EXYNOS4210,
|
|
};
|
|
#define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
|
|
#else
|
|
#define EXYNOS4210_TMU_DRV_DATA (NULL)
|
|
#endif
|
|
|
|
#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412) || \
|
|
defined(CONFIG_SOC_EXYNOS4212)
|
|
static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
|
|
.threshold_falling = 10,
|
|
.trigger_levels[0] = 85,
|
|
.trigger_levels[1] = 103,
|
|
.trigger_levels[2] = 110,
|
|
.trigger_level0_en = 1,
|
|
.trigger_level1_en = 1,
|
|
.trigger_level2_en = 1,
|
|
.trigger_level3_en = 0,
|
|
.gain = 8,
|
|
.reference_voltage = 16,
|
|
.noise_cancel_mode = 4,
|
|
.cal_type = TYPE_ONE_POINT_TRIMMING,
|
|
.efuse_value = 55,
|
|
.freq_tab[0] = {
|
|
.freq_clip_max = 800 * 1000,
|
|
.temp_level = 85,
|
|
},
|
|
.freq_tab[1] = {
|
|
.freq_clip_max = 200 * 1000,
|
|
.temp_level = 103,
|
|
},
|
|
.freq_tab_count = 2,
|
|
.type = SOC_ARCH_EXYNOS,
|
|
};
|
|
#define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
|
|
#else
|
|
#define EXYNOS_TMU_DRV_DATA (NULL)
|
|
#endif
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id exynos_tmu_match[] = {
|
|
{
|
|
.compatible = "samsung,exynos4210-tmu",
|
|
.data = (void *)EXYNOS4210_TMU_DRV_DATA,
|
|
},
|
|
{
|
|
.compatible = "samsung,exynos4412-tmu",
|
|
.data = (void *)EXYNOS_TMU_DRV_DATA,
|
|
},
|
|
{
|
|
.compatible = "samsung,exynos5250-tmu",
|
|
.data = (void *)EXYNOS_TMU_DRV_DATA,
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
|
|
#endif
|
|
|
|
static struct platform_device_id exynos_tmu_driver_ids[] = {
|
|
{
|
|
.name = "exynos4210-tmu",
|
|
.driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
|
|
},
|
|
{
|
|
.name = "exynos5250-tmu",
|
|
.driver_data = (kernel_ulong_t)EXYNOS_TMU_DRV_DATA,
|
|
},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
|
|
|
|
static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
|
|
struct platform_device *pdev)
|
|
{
|
|
#ifdef CONFIG_OF
|
|
if (pdev->dev.of_node) {
|
|
const struct of_device_id *match;
|
|
match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
|
|
if (!match)
|
|
return NULL;
|
|
return (struct exynos_tmu_platform_data *) match->data;
|
|
}
|
|
#endif
|
|
return (struct exynos_tmu_platform_data *)
|
|
platform_get_device_id(pdev)->driver_data;
|
|
}
|
|
|
|
static int exynos_tmu_probe(struct platform_device *pdev)
|
|
{
|
|
struct exynos_tmu_data *data;
|
|
struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
|
|
int ret, i;
|
|
|
|
if (!pdata)
|
|
pdata = exynos_get_driver_data(pdev);
|
|
|
|
if (!pdata) {
|
|
dev_err(&pdev->dev, "No platform init data supplied.\n");
|
|
return -ENODEV;
|
|
}
|
|
data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
|
|
GFP_KERNEL);
|
|
if (!data) {
|
|
dev_err(&pdev->dev, "Failed to allocate driver structure\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
data->irq = platform_get_irq(pdev, 0);
|
|
if (data->irq < 0) {
|
|
dev_err(&pdev->dev, "Failed to get platform irq\n");
|
|
return data->irq;
|
|
}
|
|
|
|
INIT_WORK(&data->irq_work, exynos_tmu_work);
|
|
|
|
data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
data->base = devm_ioremap_resource(&pdev->dev, data->mem);
|
|
if (IS_ERR(data->base))
|
|
return PTR_ERR(data->base);
|
|
|
|
ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
|
|
IRQF_TRIGGER_RISING, "exynos-tmu", data);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
|
|
return ret;
|
|
}
|
|
|
|
data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
|
|
if (IS_ERR(data->clk)) {
|
|
dev_err(&pdev->dev, "Failed to get clock\n");
|
|
return PTR_ERR(data->clk);
|
|
}
|
|
|
|
ret = clk_prepare(data->clk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (pdata->type == SOC_ARCH_EXYNOS ||
|
|
pdata->type == SOC_ARCH_EXYNOS4210)
|
|
data->soc = pdata->type;
|
|
else {
|
|
ret = -EINVAL;
|
|
dev_err(&pdev->dev, "Platform not supported\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
data->pdata = pdata;
|
|
platform_set_drvdata(pdev, data);
|
|
mutex_init(&data->lock);
|
|
|
|
ret = exynos_tmu_initialize(pdev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to initialize TMU\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
exynos_tmu_control(pdev, true);
|
|
|
|
/* Register the sensor with thermal management interface */
|
|
(&exynos_sensor_conf)->private_data = data;
|
|
exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
|
|
pdata->trigger_level1_en + pdata->trigger_level2_en +
|
|
pdata->trigger_level3_en;
|
|
|
|
for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
|
|
exynos_sensor_conf.trip_data.trip_val[i] =
|
|
pdata->threshold + pdata->trigger_levels[i];
|
|
|
|
exynos_sensor_conf.trip_data.trigger_falling = pdata->threshold_falling;
|
|
|
|
exynos_sensor_conf.cooling_data.freq_clip_count =
|
|
pdata->freq_tab_count;
|
|
for (i = 0; i < pdata->freq_tab_count; i++) {
|
|
exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
|
|
pdata->freq_tab[i].freq_clip_max;
|
|
exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
|
|
pdata->freq_tab[i].temp_level;
|
|
}
|
|
|
|
ret = exynos_register_thermal(&exynos_sensor_conf);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to register thermal interface\n");
|
|
goto err_clk;
|
|
}
|
|
|
|
return 0;
|
|
err_clk:
|
|
clk_unprepare(data->clk);
|
|
return ret;
|
|
}
|
|
|
|
static int exynos_tmu_remove(struct platform_device *pdev)
|
|
{
|
|
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
|
|
|
|
exynos_tmu_control(pdev, false);
|
|
|
|
exynos_unregister_thermal();
|
|
|
|
clk_unprepare(data->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int exynos_tmu_suspend(struct device *dev)
|
|
{
|
|
exynos_tmu_control(to_platform_device(dev), false);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int exynos_tmu_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
exynos_tmu_initialize(pdev);
|
|
exynos_tmu_control(pdev, true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
|
|
exynos_tmu_suspend, exynos_tmu_resume);
|
|
#define EXYNOS_TMU_PM (&exynos_tmu_pm)
|
|
#else
|
|
#define EXYNOS_TMU_PM NULL
|
|
#endif
|
|
|
|
static struct platform_driver exynos_tmu_driver = {
|
|
.driver = {
|
|
.name = "exynos-tmu",
|
|
.owner = THIS_MODULE,
|
|
.pm = EXYNOS_TMU_PM,
|
|
.of_match_table = of_match_ptr(exynos_tmu_match),
|
|
},
|
|
.probe = exynos_tmu_probe,
|
|
.remove = exynos_tmu_remove,
|
|
.id_table = exynos_tmu_driver_ids,
|
|
};
|
|
|
|
module_platform_driver(exynos_tmu_driver);
|
|
|
|
MODULE_DESCRIPTION("EXYNOS TMU Driver");
|
|
MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:exynos-tmu");
|