62e59c4e69
Now that we've gotten rid of clk_readl() we can remove io.h from the clk-provider header and push out the io.h include to any code that isn't already including the io.h header but using things like readl/writel, etc. Found with this grep: git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \ xargs git grep -l \ -e '\<__iowrite32_copy\>' --or \ -e '\<__ioread32_copy\>' --or \ -e '\<__iowrite64_copy\>' --or \ -e '\<ioremap_page_range\>' --or \ -e '\<ioremap_huge_init\>' --or \ -e '\<arch_ioremap_pud_supported\>' --or \ -e '\<arch_ioremap_pmd_supported\>' --or \ -e '\<devm_ioport_map\>' --or \ -e '\<devm_ioport_unmap\>' --or \ -e '\<IOMEM_ERR_PTR\>' --or \ -e '\<devm_ioremap\>' --or \ -e '\<devm_ioremap_nocache\>' --or \ -e '\<devm_ioremap_wc\>' --or \ -e '\<devm_iounmap\>' --or \ -e '\<devm_ioremap_release\>' --or \ -e '\<devm_memremap\>' --or \ -e '\<devm_memunmap\>' --or \ -e '\<__devm_memremap_pages\>' --or \ -e '\<pci_remap_cfgspace\>' --or \ -e '\<arch_has_dev_port\>' --or \ -e '\<arch_phys_wc_add\>' --or \ -e '\<arch_phys_wc_del\>' --or \ -e '\<memremap\>' --or \ -e '\<memunmap\>' --or \ -e '\<arch_io_reserve_memtype_wc\>' --or \ -e '\<arch_io_free_memtype_wc\>' --or \ -e '\<__io_aw\>' --or \ -e '\<__io_pbw\>' --or \ -e '\<__io_paw\>' --or \ -e '\<__io_pbr\>' --or \ -e '\<__io_par\>' --or \ -e '\<__raw_readb\>' --or \ -e '\<__raw_readw\>' --or \ -e '\<__raw_readl\>' --or \ -e '\<__raw_readq\>' --or \ -e '\<__raw_writeb\>' --or \ -e '\<__raw_writew\>' --or \ -e '\<__raw_writel\>' --or \ -e '\<__raw_writeq\>' --or \ -e '\<readb\>' --or \ -e '\<readw\>' --or \ -e '\<readl\>' --or \ -e '\<readq\>' --or \ -e '\<writeb\>' --or \ -e '\<writew\>' --or \ -e '\<writel\>' --or \ -e '\<writeq\>' --or \ -e '\<readb_relaxed\>' --or \ -e '\<readw_relaxed\>' --or \ -e '\<readl_relaxed\>' --or \ -e '\<readq_relaxed\>' --or \ -e '\<writeb_relaxed\>' --or \ -e '\<writew_relaxed\>' --or \ -e '\<writel_relaxed\>' --or \ -e '\<writeq_relaxed\>' --or \ -e '\<readsb\>' --or \ -e '\<readsw\>' --or \ -e '\<readsl\>' --or \ -e '\<readsq\>' --or \ -e '\<writesb\>' --or \ -e '\<writesw\>' --or \ -e '\<writesl\>' --or \ -e '\<writesq\>' --or \ -e '\<inb\>' --or \ -e '\<inw\>' --or \ -e '\<inl\>' --or \ -e '\<outb\>' --or \ -e '\<outw\>' --or \ -e '\<outl\>' --or \ -e '\<inb_p\>' --or \ -e '\<inw_p\>' --or \ -e '\<inl_p\>' --or \ -e '\<outb_p\>' --or \ -e '\<outw_p\>' --or \ -e '\<outl_p\>' --or \ -e '\<insb\>' --or \ -e '\<insw\>' --or \ -e '\<insl\>' --or \ -e '\<outsb\>' --or \ -e '\<outsw\>' --or \ -e '\<outsl\>' --or \ -e '\<insb_p\>' --or \ -e '\<insw_p\>' --or \ -e '\<insl_p\>' --or \ -e '\<outsb_p\>' --or \ -e '\<outsw_p\>' --or \ -e '\<outsl_p\>' --or \ -e '\<ioread8\>' --or \ -e '\<ioread16\>' --or \ -e '\<ioread32\>' --or \ -e '\<ioread64\>' --or \ -e '\<iowrite8\>' --or \ -e '\<iowrite16\>' --or \ -e '\<iowrite32\>' --or \ -e '\<iowrite64\>' --or \ -e '\<ioread16be\>' --or \ -e '\<ioread32be\>' --or \ -e '\<ioread64be\>' --or \ -e '\<iowrite16be\>' --or \ -e '\<iowrite32be\>' --or \ -e '\<iowrite64be\>' --or \ -e '\<ioread8_rep\>' --or \ -e '\<ioread16_rep\>' --or \ -e '\<ioread32_rep\>' --or \ -e '\<ioread64_rep\>' --or \ -e '\<iowrite8_rep\>' --or \ -e '\<iowrite16_rep\>' --or \ -e '\<iowrite32_rep\>' --or \ -e '\<iowrite64_rep\>' --or \ -e '\<__io_virt\>' --or \ -e '\<pci_iounmap\>' --or \ -e '\<virt_to_phys\>' --or \ -e '\<phys_to_virt\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap\>' --or \ -e '\<__ioremap\>' --or \ -e '\<iounmap\>' --or \ -e '\<ioremap\>' --or \ -e '\<ioremap_nocache\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wt\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<xlate_dev_kmem_ptr\>' --or \ -e '\<xlate_dev_mem_ptr\>' --or \ -e '\<unxlate_dev_mem_ptr\>' --or \ -e '\<virt_to_bus\>' --or \ -e '\<bus_to_virt\>' --or \ -e '\<memset_io\>' --or \ -e '\<memcpy_fromio\>' --or \ -e '\<memcpy_toio\>' I also reordered a couple includes when they weren't alphabetical and removed clk.h from kona, replacing it with clk-provider.h because that driver doesn't use clk consumer APIs. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: John Crispin <john@phrozen.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
146 lines
3.1 KiB
C
146 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* H8S2678 clock driver
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*
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* Copyright 2015 Yoshinori Sato <ysato@users.sourceforge.jp>
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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static DEFINE_SPINLOCK(clklock);
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#define MAX_FREQ 33333333
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#define MIN_FREQ 8000000
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struct pll_clock {
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struct clk_hw hw;
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void __iomem *sckcr;
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void __iomem *pllcr;
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};
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#define to_pll_clock(_hw) container_of(_hw, struct pll_clock, hw)
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static unsigned long pll_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct pll_clock *pll_clock = to_pll_clock(hw);
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int mul = 1 << (readb(pll_clock->pllcr) & 3);
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return parent_rate * mul;
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}
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static long pll_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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int i, m = -1;
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long offset[3];
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if (rate > MAX_FREQ)
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rate = MAX_FREQ;
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if (rate < MIN_FREQ)
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rate = MIN_FREQ;
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for (i = 0; i < 3; i++)
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offset[i] = abs(rate - (*prate * (1 << i)));
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for (i = 0; i < 3; i++)
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if (m < 0)
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m = i;
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else
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m = (offset[i] < offset[m])?i:m;
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return *prate * (1 << m);
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}
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static int pll_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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int pll;
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unsigned char val;
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unsigned long flags;
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struct pll_clock *pll_clock = to_pll_clock(hw);
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pll = ((rate / parent_rate) / 2) & 0x03;
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spin_lock_irqsave(&clklock, flags);
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val = readb(pll_clock->sckcr);
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val |= 0x08;
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writeb(val, pll_clock->sckcr);
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val = readb(pll_clock->pllcr);
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val &= ~0x03;
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val |= pll;
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writeb(val, pll_clock->pllcr);
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spin_unlock_irqrestore(&clklock, flags);
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return 0;
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}
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static const struct clk_ops pll_ops = {
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.recalc_rate = pll_recalc_rate,
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.round_rate = pll_round_rate,
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.set_rate = pll_set_rate,
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};
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static void __init h8s2678_pll_clk_setup(struct device_node *node)
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{
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unsigned int num_parents;
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const char *clk_name = node->name;
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const char *parent_name;
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struct pll_clock *pll_clock;
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struct clk_init_data init;
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int ret;
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num_parents = of_clk_get_parent_count(node);
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if (!num_parents) {
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pr_err("%s: no parent found\n", clk_name);
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return;
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}
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pll_clock = kzalloc(sizeof(*pll_clock), GFP_KERNEL);
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if (!pll_clock)
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return;
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pll_clock->sckcr = of_iomap(node, 0);
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if (pll_clock->sckcr == NULL) {
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pr_err("%s: failed to map divide register\n", clk_name);
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goto free_clock;
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}
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pll_clock->pllcr = of_iomap(node, 1);
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if (pll_clock->pllcr == NULL) {
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pr_err("%s: failed to map multiply register\n", clk_name);
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goto unmap_sckcr;
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}
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parent_name = of_clk_get_parent_name(node, 0);
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init.name = clk_name;
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init.ops = &pll_ops;
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init.flags = 0;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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pll_clock->hw.init = &init;
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ret = clk_hw_register(NULL, &pll_clock->hw);
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if (ret) {
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pr_err("%s: failed to register %s div clock (%d)\n",
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__func__, clk_name, ret);
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goto unmap_pllcr;
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}
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of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll_clock->hw);
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return;
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unmap_pllcr:
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iounmap(pll_clock->pllcr);
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unmap_sckcr:
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iounmap(pll_clock->sckcr);
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free_clock:
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kfree(pll_clock);
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}
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CLK_OF_DECLARE(h8s2678_div_clk, "renesas,h8s2678-pll-clock",
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h8s2678_pll_clk_setup);
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